Lines Matching +full:0 +full:x2b000000
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
18 : SDTypeProfile<1, 1, [SDTCisVT<0, f32>, SDTCisVT<1, i64>]>;
20 : SDTypeProfile<1, 1, [SDTCisVT<0, i64>, SDTCisVT<1, f32>]>;
21 def SDT_LoongArchFTINT : SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisFP<1>]>;
36 def FADD_S : FP_ALU_3R<0x01008000>;
37 def FSUB_S : FP_ALU_3R<0x01028000>;
38 def FMUL_S : FP_ALU_3R<0x01048000>;
39 def FDIV_S : FP_ALU_3R<0x01068000>;
40 def FMADD_S : FP_ALU_4R<0x08100000>;
41 def FMSUB_S : FP_ALU_4R<0x08500000>;
42 def FNMADD_S : FP_ALU_4R<0x08900000>;
43 def FNMSUB_S : FP_ALU_4R<0x08d00000>;
44 def FMAX_S : FP_ALU_3R<0x01088000>;
45 def FMIN_S : FP_ALU_3R<0x010a8000>;
46 def FMAXA_S : FP_ALU_3R<0x010c8000>;
47 def FMINA_S : FP_ALU_3R<0x010e8000>;
48 def FABS_S : FP_ALU_2R<0x01140400>;
49 def FNEG_S : FP_ALU_2R<0x01141400>;
50 def FSQRT_S : FP_ALU_2R<0x01144400>;
51 def FRECIP_S : FP_ALU_2R<0x01145400>;
52 def FRSQRT_S : FP_ALU_2R<0x01146400>;
53 def FRECIPE_S : FP_ALU_2R<0x01147400>;
54 def FRSQRTE_S : FP_ALU_2R<0x01148400>;
55 def FSCALEB_S : FP_ALU_3R<0x01108000>;
56 def FLOGB_S : FP_ALU_2R<0x01142400>;
57 def FCOPYSIGN_S : FP_ALU_3R<0x01128000>;
58 def FCLASS_S : FP_ALU_2R<0x01143400>;
62 def FCMP_CAF_S : FP_CMP<0x0c100000>;
63 def FCMP_CUN_S : FP_CMP<0x0c140000>;
64 def FCMP_CEQ_S : FP_CMP<0x0c120000>;
65 def FCMP_CUEQ_S : FP_CMP<0x0c160000>;
66 def FCMP_CLT_S : FP_CMP<0x0c110000>;
67 def FCMP_CULT_S : FP_CMP<0x0c150000>;
68 def FCMP_CLE_S : FP_CMP<0x0c130000>;
69 def FCMP_CULE_S : FP_CMP<0x0c170000>;
70 def FCMP_CNE_S : FP_CMP<0x0c180000>;
71 def FCMP_COR_S : FP_CMP<0x0c1a0000>;
72 def FCMP_CUNE_S : FP_CMP<0x0c1c0000>;
73 def FCMP_SAF_S : FP_CMP<0x0c108000>;
74 def FCMP_SUN_S : FP_CMP<0x0c148000>;
75 def FCMP_SEQ_S : FP_CMP<0x0c128000>;
76 def FCMP_SUEQ_S : FP_CMP<0x0c168000>;
77 def FCMP_SLT_S : FP_CMP<0x0c118000>;
78 def FCMP_SULT_S : FP_CMP<0x0c158000>;
79 def FCMP_SLE_S : FP_CMP<0x0c138000>;
80 def FCMP_SULE_S : FP_CMP<0x0c178000>;
81 def FCMP_SNE_S : FP_CMP<0x0c188000>;
82 def FCMP_SOR_S : FP_CMP<0x0c1a8000>;
83 def FCMP_SUNE_S : FP_CMP<0x0c1c8000>;
86 def FFINT_S_W : FP_CONV<0x011d1000>;
87 def FTINT_W_S : FP_CONV<0x011b0400>;
88 def FTINTRM_W_S : FP_CONV<0x011a0400>;
89 def FTINTRP_W_S : FP_CONV<0x011a4400>;
90 def FTINTRZ_W_S : FP_CONV<0x011a8400>;
91 def FTINTRNE_W_S : FP_CONV<0x011ac400>;
92 def FRINT_S : FP_CONV<0x011e4400>;
95 def FSEL_xS : FP_SEL<0x0d000000>;
96 def FMOV_S : FP_MOV<0x01149400>;
97 def MOVGR2FR_W : FP_MOV<0x0114a400, FPR32, GPR>;
98 def MOVFR2GR_S : FP_MOV<0x0114b400, GPR, FPR32>;
100 def MOVGR2FCSR : FP_MOV<0x0114c000, FCSR, GPR>;
101 def MOVFCSR2GR : FP_MOV<0x0114c800, GPR, FCSR>;
103 def MOVFR2CF_xS : FP_MOV<0x0114d000, CFR, FPR32>;
104 def MOVCF2FR_xS : FP_MOV<0x0114d400, FPR32, CFR>;
105 def MOVGR2CF : FP_MOV<0x0114d800, CFR, GPR>;
106 def MOVCF2GR : FP_MOV<0x0114dc00, GPR, CFR>;
109 def BCEQZ : FP_BRANCH<0x48000000>;
110 def BCNEZ : FP_BRANCH<0x48000100>;
113 def FLD_S : FP_LOAD_2RI12<0x2b000000>;
114 def FST_S : FP_STORE_2RI12<0x2b400000>;
115 def FLDX_S : FP_LOAD_3R<0x38300000>;
116 def FSTX_S : FP_STORE_3R<0x38380000>;
119 def FLDGT_S : FP_LOAD_3R<0x38740000>;
120 def FLDLE_S : FP_LOAD_3R<0x38750000>;
121 def FSTGT_S : FP_STORE_3R<0x38760000>;
122 def FSTLE_S : FP_STORE_3R<0x38770000>;
125 let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in
128 let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in
136 def SET_CFR_FALSE : SET_CFR<0x0c100000, "fcmp.caf.s">;
138 def SET_CFR_TRUE : SET_CFR<0x0c160000, "fcmp.cueq.s">;
142 let mayLoad = 0;
143 let mayStore = 0;
144 let hasSideEffects = 0;