Lines Matching +full:merge +full:- +full:base
1 //===-- LanaiMemAluCombiner.cpp - Pass to combine memory & ALU operations -===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // The Lanai ISA supports instructions where a load/store modifies the base
15 // ld [ %r6 -- ], %r12
19 // add %r6, -4, %r6
23 //===----------------------------------------------------------------------===//
38 #define DEBUG_TYPE "lanai-mem-alu-combiner"
43 "disable-lanai-mem-alu-combiner", llvm::cl::init(false),
146 // Check if the machine instruction has non-volatile memory operands of the type
153 // testing if the computed merge opcode is a valid memory operation opcode.
161 if (MemOperand->isVolatile() || MemOperand->isAtomic())
190 for (MachineInstr::const_mop_iterator Mop = Instr->operands_begin();
191 Mop != Instr->operands_end(); ++Mop) {
240 MachineOperand Dest = MemInstr->getOperand(0);
241 MachineOperand Base = MemInstr->getOperand(1);
242 MachineOperand MemOffset = MemInstr->getOperand(2);
243 MachineOperand AluOffset = AluInstr->getOperand(2);
247 "Unsupported operand type in merge");
250 LPAC::AluCode AluOpcode = mergedAluCode(AluInstr->getOpcode());
251 unsigned NewOpc = mergedOpcode(MemInstr->getOpcode(), AluOffset.isImm());
258 BuildMI(*BB, MemInstr, MemInstr->getDebugLoc(), TII->get(NewOpc));
260 InstrBuilder.addReg(Base.getReg(), getKillRegState(true));
268 llvm_unreachable("Unsupported ld/st ALU merge.");
270 // Create a pre-op if the ALU operation preceded the memory operation or the
271 // MemOffset is non-zero (i.e. the memory value should be adjusted before
272 // accessing it), else create a post-op.
279 InstrBuilder.setMemRefs(MemInstr->memoperands());
283 // a load/store with base and offset.
285 const MachineOperand &Base,
288 if (AluIter->getNumOperands() != 3)
291 MachineOperand &Dest = AluIter->getOperand(0);
292 MachineOperand &Op1 = AluIter->getOperand(1);
293 MachineOperand &Op2 = AluIter->getOperand(2);
295 // Only match instructions using the base register as destination and with the
296 // base and first operand equal
297 if (!isSameOperand(Dest, Base) || !isSameOperand(Dest, Op1))
303 if (AluIter->getOpcode() != Lanai::ADD_I_LO)
330 MachineOperand *Base = &MemInstr->getOperand(1);
331 MachineOperand *Offset = &MemInstr->getOperand(2);
332 bool IsSpls = isSpls(MemInstr->getOpcode());
335 MbbIterator Last = Decrement ? BB->begin() : BB->end();
338 Decrement ? --First : ++First;
344 if (First->isDebugInstr())
347 if (isSuitableAluInstr(IsSpls, First, *Base, *Offset)) {
351 // Usage of the base or offset register is not a form suitable for merging.
353 if (InstrUsesReg(First, Base))
355 if (Offset->isReg() && InstrUsesReg(First, Offset))
366 MbbIterator MBBIter = BB->begin(), End = BB->end();
371 MachineOperand AluOperand = MBBIter->getOperand(3);
372 unsigned int DestReg = MBBIter->getOperand(0).getReg(),
373 BaseReg = MBBIter->getOperand(1).getReg();
377 // Skip memory operations that already modify the base register or if
378 // the destination and base register are the same
390 BB->erase(AluIter);
392 BB->erase(MBBIter++);