Lines Matching full:gpr
192 let MIOperandInfo = (ops GPR:$base, i32lo16s:$offset, AluOp:$Opcode);
204 let MIOperandInfo = (ops GPR:$Op1, GPR:$Op2, AluOp:$Opcode);
226 let MIOperandInfo = (ops GPR:$base, imm10:$offset, AluOp:$Opcode);
277 def LO : InstRI<subOp, (outs GPR:$Rd), (ins GPR:$Rs1, LoExt:$imm16),
281 def HI : InstRI<subOp, (outs GPR:$Rd), (ins GPR:$Rs1, HiExt:$imm16),
293 def R : InstRR<subOp, (outs GPR:$Rd), (ins GPR:$Rs1, GPR:$Rs2, pred:$DDDI),
295 [(set GPR:$Rd, (OpNode GPR:$Rs1, GPR:$Rs2))]>;
301 [(set GPR:$Rd, (OpNode GPR:$Rs1, LoExt:$imm16))],
302 [(set GPR:$Rd, (OpNode GPR:$Rs1, HiExt:$imm16))]>;
306 def R : InstRR<subOp, (outs GPR:$Rd), (ins GPR:$Rs1, GPR:$Rs2, pred:$DDDI),
308 [(set GPR:$Rd, (OpNode GPR:$Rs1, GPR:$Rs2))]>;
324 def : Pat<(add GPR:$Rs1, i32lo16z:$imm),
325 (ADD_I_LO GPR:$Rs1, i32lo16z:$imm)>;
327 def : Pat<(sub GPR:$Rs1, i32lo16z:$imm),
328 (SUB_I_LO GPR:$Rs1, i32lo16z:$imm)>;
330 def : Pat<(add GPR:$Rs1, i32hi16:$imm),
331 (ADD_I_HI GPR:$Rs1, i32hi16:$imm)>;
333 def : Pat<(sub GPR:$Rs1, i32hi16:$imm),
334 (SUB_I_HI GPR:$Rs1, i32hi16:$imm)>;
340 def : Pat<(add GPR:$Rs1, i32neg16:$imm),
341 (SUB_I_LO GPR:$Rs1, (NEG $imm))>;
342 def : Pat<(sub GPR:$Rs1, i32neg16:$imm),
343 (ADD_I_LO GPR:$Rs1, (NEG $imm))>;
351 def : Pat<(addc GPR:$Rs1, i32lo16z:$imm),
352 (ADD_F_I_LO GPR:$Rs1, i32lo16z:$imm)>;
354 def : Pat<(subc GPR:$Rs1, i32lo16z:$imm),
355 (SUB_F_I_LO GPR:$Rs1, i32lo16z:$imm)>;
357 def : Pat<(addc GPR:$Rs1, i32hi16:$imm),
358 (ADD_F_I_HI GPR:$Rs1, i32hi16:$imm)>;
360 def : Pat<(subc GPR:$Rs1, i32hi16:$imm),
361 (SUB_F_I_HI GPR:$Rs1, i32hi16:$imm)>;
369 def : Pat<(adde GPR:$Rs1, i32lo16z:$imm),
370 (ADDC_I_LO GPR:$Rs1, i32lo16z:$imm)>;
372 def : Pat<(sube GPR:$Rs1, i32lo16z:$imm),
373 (SUBB_I_LO GPR:$Rs1, i32lo16z:$imm)>;
375 def : Pat<(adde GPR:$Rs1, i32hi16:$imm),
376 (ADDC_I_HI GPR:$Rs1, i32hi16:$imm)>;
378 def : Pat<(sube GPR:$Rs1, i32hi16:$imm),
379 (SUBB_I_HI GPR:$Rs1, i32hi16:$imm)>;
395 def : Pat<(LanaiSubbF GPR:$Rs1, GPR:$Rs2),
396 (SUBB_F_R GPR:$Rs1, GPR:$Rs2)>;
398 def : Pat<(LanaiSubbF GPR:$Rs1, i32lo16z:$imm),
399 (SUBB_F_I_LO GPR:$Rs1, i32lo16z:$imm)>;
401 def : Pat<(LanaiSubbF GPR:$Rs1, i32hi16:$imm),
402 (SUBB_F_I_HI GPR:$Rs1, i32hi16:$imm)>;
404 def : InstAlias<"mov $src, $dst", (ADD_R GPR:$dst, GPR:$src, R0, 0)>;
408 def MOVHI : InstRI<0b000, (outs GPR:$Rd), (ins i32hi16:$imm16),
410 [(set GPR:$Rd, i32hi16:$imm16)]>;
412 def : InstAlias<"mov $imm16, $dst", (ADD_I_LO GPR:$dst, R0, i32lo16z:$imm16)>;
413 def : InstAlias<"mov $imm16, $dst", (ADD_I_HI GPR:$dst, R0, i32hi16:$imm16)>;
415 (AND_I_LO GPR:$dst, R1, i32lo16and:$imm16)>;
417 (AND_I_HI GPR:$dst, R1, i32hi16and:$imm16)>;
421 : InstRI<0b111, (outs GPR:$Rd), (ins GPR:$Rs1, immShift:$imm16),
428 def SL_I : ShiftRI<"sh", [(set GPR:$Rd, (shl GPR:$Rs1, immShift:$imm16))]>;
432 def : Pat<(srl GPR:$Rs1, immShift:$imm), (SL_I GPR:$Rs1, (NEG $imm))>;
433 def : Pat<(sra GPR:$Rs1, immShift:$imm), (SA_I GPR:$Rs1, (NEG $imm))>;
443 : InstRR<0b111, (outs GPR:$Rd), (ins GPR:$Rs1, GPR:$Rs2, pred:$DDDI), AsmStr,
449 [(set GPR:$Rd, (shl GPR:$Rs1, GPR:$Rs2))]>;
470 def : Pat<(srl GPR:$Rs1, GPR:$Rs2),
471 (SRL_R GPR:$Rs1, (SUB_R R0, GPR:$Rs2))>;
472 def : Pat<(sra GPR:$Rs1, GPR:$Rs2),
473 (SRA_R GPR:$Rs1, (SUB_R R0, GPR:$Rs2))>;
480 : InstRRM<0b0, (outs GPR:$Rd), (ins MEMrr:$src),
482 [(set (Ty GPR:$Rd), (OpNode ADDRrr:$src))]>,
496 : InstRM<0b0, (outs GPR:$Rd), (ins MEMri:$src),
498 [(set (Ty GPR:$Rd), (OpNode ADDRri:$src))]>,
520 def : InstAlias<"ld $src, $dst", (LDW_RI GPR:$dst, MEMri:$src)>;
542 def LDADDR : InstSLS<0x0, (outs GPR:$Rd), (ins MEMi:$src),
544 [(set (i32 GPR:$Rd), (load ADDRsls:$src))]>,
556 : InstSPLS<(outs GPR:$Rd), (ins MEMspls:$src),
558 [(set (i32 GPR:$Rd), (opNode ADDRspls:$src))]>,
582 def SLI : InstSLI<(outs GPR:$Rd), (ins i32lo21:$imm),
584 [(set GPR:$Rd, i32lo21:$imm)]> {
598 : InstRRM<0b1, (outs), (ins GPR:$Rd, MEMrr:$dst),
600 [(OpNode (Ty GPR:$Rd), ADDRrr:$dst)]>,
615 : InstRM<0b1, (outs), (ins GPR:$Rd, MEMri:$dst),
617 [(OpNode (Ty GPR:$Rd), ADDRri:$dst)]>,
641 def STADDR : InstSLS<0x1, (outs), (ins GPR:$Rd, MEMi:$dst),
643 [(store (i32 GPR:$Rd), ADDRsls:$dst)]>,
654 : InstSPLS<(outs), (ins GPR:$Rd, MEMspls:$dst),
656 [(opNode (i32 GPR:$Rd), ADDRspls:$dst)]>,
690 def JR : InstRR<0b101, (outs), (ins GPR:$Rs2), "bt\t$Rs2",
691 [(brind GPR:$Rs2)]> {
708 def _RR : InstRR<op2Val, (outs), (ins GPR:$Rs1, GPR:$Rs2),
710 [(LanaiSetFlag (i32 GPR:$Rs1), (i32 GPR:$Rs2))]>;
712 def _RI_LO : InstRI<op2Val, (outs), (ins GPR:$Rs1, i32lo16z:$imm16),
714 [(LanaiSetFlag (i32 GPR:$Rs1), i32lo16z:$imm16)]>;
716 def _RI_HI : InstRI<op2Val, (outs), (ins GPR:$Rs1, i32hi16:$imm16),
718 [(LanaiSetFlag (i32 GPR:$Rs1), i32hi16:$imm16)]>;
728 def CALLR : Pseudo<(outs), (ins GPR:$Rs1), "", [(Call GPR:$Rs1)]>;
762 def ADJDYNALLOC : Pseudo<(outs GPR:$dst), (ins GPR:$src),
764 [(set GPR:$dst, (LanaiAdjDynAlloc GPR:$src))]>;
768 def SCC : InstSCC<(outs GPR:$Rs1), (ins CCOp:$DDDI),
770 [(set (i32 GPR:$Rs1), (LanaiSetCC imm:$DDDI))]>;
775 def SELECT : InstRR<0b111, (outs GPR:$Rd),
776 (ins GPR:$Rs1, GPR:$Rs2, CCOp:$DDDI),
778 [(set (i32 GPR:$Rd),
779 (LanaiSelectCC (i32 GPR:$Rs1), (i32 GPR:$Rs2),
788 def BRIND_CC : InstRR<0b101, (outs), (ins GPR:$Rs1, CCOp:$DDDI),
796 def BRIND_CCA : InstRR<0b101, (outs), (ins GPR:$Rs1, GPR:$Rs2, CCOp:$DDDI),
813 def POPC: InstSpecial<0b001, (outs GPR:$Rd), (ins GPR:$Rs1),
815 [(set GPR:$Rd, (ctpop GPR:$Rs1))]>;
818 def LEADZ: InstSpecial<0b010, (outs GPR:$Rd), (ins GPR:$Rs1),
819 "leadz\t$Rs1, $Rd", [(set GPR:$Rd, (ctlz GPR:$Rs1))]>;
822 def TRAILZ : InstSpecial<0b011, (outs GPR:$Rd), (ins GPR:$Rs1),
824 [(set GPR:$Rd, (cttz GPR:$Rs1))]>;
866 def : Pat<(or GPR:$hi, (LanaiLo tglobaladdr:$lo)),
867 (OR_I_LO GPR:$hi, tglobaladdr:$lo)>;
870 def : Pat<(or GPR:$hi, (LanaiLo texternalsym:$lo)),
871 (OR_I_LO GPR:$hi, texternalsym:$lo)>;
874 def : Pat<(or GPR:$hi, (LanaiLo tblockaddress:$lo)),
875 (OR_I_LO GPR:$hi, tblockaddress:$lo)>;
878 def : Pat<(or GPR:$hi, (LanaiLo tjumptable:$lo)),
879 (OR_I_LO GPR:$hi, tjumptable:$lo)>;
882 def : Pat<(or GPR:$hi, (LanaiLo tconstpool:$lo)),
883 (OR_I_LO GPR:$hi, tconstpool:$lo)>;