57     unsigned genElemLoad(MachineInstr *ExtI, unsigned BaseR,
67 unsigned HexagonVExtract::genElemLoad(MachineInstr *ExtI, unsigned BaseR,  in genElemLoad()  argument
69   MachineBasicBlock &ExtB = *ExtI->getParent();  in genElemLoad()
70   DebugLoc DL = ExtI->getDebugLoc();  in genElemLoad()
73   Register ExtIdxR = ExtI->getOperand(2).getReg();  in genElemLoad()
74   unsigned ExtIdxS = ExtI->getOperand(2).getSubReg();  in genElemLoad()
83       BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L2_loadri_io), ElemR)  in genElemLoad()
91   BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::A2_andir), IdxR)  in genElemLoad()
92     .add(ExtI->getOperand(2))  in genElemLoad()
94   BuildMI(ExtB, ExtI, DL, HII->get(Hexagon::L4_loadri_rr), ElemR)  in genElemLoad()
163     for (MachineInstr *ExtI : P.second) {  in runOnMachineFunction()
164       assert(ExtI->getOpcode() == Hexagon::V6_extractw);  in runOnMachineFunction()
165       unsigned SR = ExtI->getOperand(1).getSubReg();  in runOnMachineFunction()
166       assert(ExtI->getOperand(1).getReg() == VecR);  in runOnMachineFunction()
168       MachineBasicBlock &ExtB = *ExtI->getParent();  in runOnMachineFunction()
169       DebugLoc DL = ExtI->getDebugLoc();  in runOnMachineFunction()
170       Register BaseR = EmitAddr(ExtB, ExtI, ExtI->getDebugLoc(), FI,  in runOnMachineFunction()
173       unsigned ElemR = genElemLoad(ExtI, BaseR, MRI);  in runOnMachineFunction()
174       Register ExtR = ExtI->getOperand(0).getReg();  in runOnMachineFunction()
176       ExtB.erase(ExtI);  in runOnMachineFunction()