Lines Matching refs:getSUnit
273 MachineInstr &MI2 = *SI.getSUnit()->getInstr(); in apply()
280 for (SDep &PI : SI.getSUnit()->Preds) { in apply()
281 if (PI.getSUnit() != &SU || PI.getKind() != SDep::Order) in apply()
284 SI.getSUnit()->setDepthDirty(); in apply()
469 MachineInstr *DDst = DDep.getSUnit()->getInstr(); in adjustSchedDependency()
557 if (!I.isAssignedRegDep() || I.getSUnit() != Dst) in restoreLatency()
606 if (!I.isAssignedRegDep() || I.getSUnit() != Dst) in changeLatency()
623 !I.getSUnit()->getInstr()->isPseudo()) in getZeroLatency()
624 return I.getSUnit(); in getZeroLatency()
701 if (ExclSrc.count(I.getSUnit()) == 0 && in isBestZeroLatency()
702 isBestZeroLatency(I.getSUnit(), DstBest, TII, ExclSrc, ExclDst)) in isBestZeroLatency()
703 changeLatency(I.getSUnit(), DstBest, 0); in isBestZeroLatency()
709 if (ExclDst.count(I.getSUnit()) == 0 && in isBestZeroLatency()
710 isBestZeroLatency(SrcBest, I.getSUnit(), TII, ExclSrc, ExclDst)) in isBestZeroLatency()
711 changeLatency(SrcBest, I.getSUnit(), 0); in isBestZeroLatency()