Lines Matching refs:SrcInst
442 MachineInstr *SrcInst = Src->getInstr(); in adjustSchedDependency() local
449 if (QII->canExecuteInBundle(*SrcInst, *DstInst) && in adjustSchedDependency()
483 InstrInfo.getOperandLatency(&InstrItins, *SrcInst, 0, *DDst, UseIdx); in adjustSchedDependency()
502 if (EnableDotCurSched && QII->isToBeScheduledASAP(*SrcInst, *DstInst) && in adjustSchedDependency()
509 Latency = updateLatency(*SrcInst, *DstInst, IsArtificial, Latency); in adjustSchedDependency()
539 int HexagonSubtarget::updateLatency(MachineInstr &SrcInst, in updateLatency() argument
549 if (QII.isHVXVec(SrcInst) || useBSBScheduling()) in updateLatency()
635 MachineInstr &SrcInst = *Src->getInstr(); in isBestZeroLatency() local
642 if (SrcInst.isPHI() || DstInst.isPHI()) in isBestZeroLatency()
645 if (!TII->isToBeScheduledASAP(SrcInst, DstInst) && in isBestZeroLatency()
646 !TII->canExecuteInBundle(SrcInst, DstInst)) in isBestZeroLatency()