Lines Matching refs:SUnits
247 for (SUnit &SU : DAG->SUnits) { in apply()
260 for (SUnit &SU : DAG->SUnits) { in apply()
323 for (unsigned su = 0, e = DAG->SUnits.size(); su != e; ++su) { in apply()
325 if (DAG->SUnits[su].getInstr()->isCall()) in apply()
326 LastSequentialCall = &DAG->SUnits[su]; in apply()
328 else if (DAG->SUnits[su].getInstr()->isCompare() && LastSequentialCall) in apply()
329 DAG->addEdge(&DAG->SUnits[su], SDep(LastSequentialCall, SDep::Barrier)); in apply()
332 shouldTFRICallBind(HII, DAG->SUnits[su], DAG->SUnits[su+1])) in apply()
333 DAG->addEdge(&DAG->SUnits[su], SDep(&DAG->SUnits[su-1], SDep::Barrier)); in apply()
349 const MachineInstr *MI = DAG->SUnits[su].getInstr(); in apply()
361 LastVRegUse[VRegHoldingReg[MO.getReg()]] = &DAG->SUnits[su]; in apply()
366 LastVRegUse[*AI] != &DAG->SUnits[su]) in apply()
368 DAG->addEdge(&DAG->SUnits[su], SDep(LastVRegUse[*AI], SDep::Barrier)); in apply()
387 for (unsigned i = 0, e = DAG->SUnits.size(); i != e; ++i) { in apply()
388 SUnit &S0 = DAG->SUnits[i]; in apply()
402 SUnit &S1 = DAG->SUnits[j]; in apply()