Lines Matching refs:getReg
213 Register R = Op.getReg(); in isFixedInstr()
260 Register T = MO.getReg(); in partitionRegisters()
373 Register Rs = MI->getOperand(1).getReg(); in profit()
374 Register Rt = MI->getOperand(2).getReg(); in profit()
441 if (Op.isReg() && Part.count(Op.getReg())) in isProfitable()
500 Register PR = Cond[1].getReg(); in collectIndRegsForLoop()
508 CmpI = MRI->getVRegDef(CmpI->getOperand(1).getReg()); in collectIndRegsForLoop()
536 Register R = MD.getReg(); in collectIndRegsForLoop()
552 Register T = UseI->getOperand(0).getReg(); in collectIndRegsForLoop()
600 Register R = Op.getReg(); in createHalfInstr()
640 UUPairMap::const_iterator F = PairMap.find(ValOp.getReg()); in splitMemRef()
647 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
650 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
656 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
660 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
670 const TargetRegisterClass *RC = MRI->getRegClass(UpdOp.getReg()); in splitMemRef()
674 .addReg(AdrOp.getReg(), RSA) in splitMemRef()
676 MRI->replaceRegWith(UpdOp.getReg(), NewR); in splitMemRef()
704 UUPairMap::const_iterator F = PairMap.find(Op0.getReg()); in splitImmediate()
731 UUPairMap::const_iterator F = PairMap.find(Op0.getReg()); in splitCombine()
740 .addReg(Op1.getReg(), getRegState(Op1), Op1.getSubReg()); in splitCombine()
748 .addReg(Op2.getReg(), getRegState(Op2), Op2.getSubReg()); in splitCombine()
760 UUPairMap::const_iterator F = PairMap.find(Op0.getReg()); in splitExt()
766 .addReg(Op1.getReg(), RS & ~RegState::Kill, Op1.getSubReg()); in splitExt()
768 .addReg(Op1.getReg(), RS, Op1.getSubReg()) in splitExt()
784 UUPairMap::const_iterator F = PairMap.find(Op0.getReg()); in splitShift()
806 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
808 .addReg(Op1.getReg(), RS, HiSR); in splitShift()
831 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
834 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
837 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
843 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
849 .addReg(Op1.getReg(), RS, HiSR) in splitShift()
854 .addReg(Op1.getReg(), RS & ~RegState::Kill, HiSR) in splitShift()
859 .addReg(Op1.getReg(), RS, HiSR) in splitShift()
865 .addReg(Op1.getReg(), RS & ~RegState::Kill, (Left ? LoSR : HiSR)); in splitShift()
871 .addReg(Op1.getReg(), RS, HiSR) in splitShift()
877 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
880 .addReg(Op1.getReg(), RS & ~RegState::Kill, HiSR); in splitShift()
883 .addReg(Op1.getReg(), RS & ~RegState::Kill, (Left ? LoSR : HiSR)) in splitShift()
888 .addReg(Op1.getReg(), RS, HiSR) in splitShift()
909 UUPairMap::const_iterator F = PairMap.find(Op0.getReg()); in splitAslOr()
941 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR) in splitAslOr()
942 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR); in splitAslOr()
944 .addReg(Op1.getReg(), RS1, HiSR) in splitAslOr()
945 .addReg(Op2.getReg(), RS2, HiSR); in splitAslOr()
948 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR) in splitAslOr()
949 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
953 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
958 .addReg(Op1.getReg(), RS1, HiSR) in splitAslOr()
962 .addReg(Op2.getReg(), RS2, HiSR) in splitAslOr()
970 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR); in splitAslOr()
972 .addReg(Op1.getReg(), RS1, HiSR) in splitAslOr()
973 .addReg(Op2.getReg(), RS2, LoSR); in splitAslOr()
981 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR); in splitAslOr()
983 .addReg(Op1.getReg(), RS1, HiSR) in splitAslOr()
984 .addReg(Op2.getReg(), RS2, LoSR) in splitAslOr()
1000 Register DstR = MI->getOperand(0).getReg(); in splitInstr()
1077 Register R = Op.getReg(); in replaceSubregUses()
1102 Register R = Op.getReg(); in collapseRegPairs()