Lines Matching refs:Rx
46 // 5. Compound instructions (e.g. Rx+Rs*Rt) are generated under the condition
337 : Pat<(AccOp RegPred:$Rx, (Op RegPred:$Rs, ImmPred:$I)),
338 (MI RegPred:$Rx, RegPred:$Rs, imm:$I)>;
342 : Pat<(AccOp RxPred:$Rx, (Op RsPred:$Rs, RtPred:$Rt)),
343 (MI RxPred:$Rx, RsPred:$Rs, RtPred:$Rt)>;
1724 def: Pat<(or I32:$Ru, (Su<And> I32:$Rx, anyimm:$s10)),
1725 (S4_or_andix IntRegs:$Ru, IntRegs:$Rx, imm:$s10)>;
1727 def: Pat<(or I32:$Rx, (Su<And> I32:$Rs, anyimm:$s10)),
1728 (S4_or_andi IntRegs:$Rx, IntRegs:$Rs, imm:$s10)>;
1729 def: Pat<(or I32:$Rx, (Su<Or> I32:$Rs, anyimm:$s10)),
1730 (S4_or_ori IntRegs:$Rx, IntRegs:$Rs, imm:$s10)>;
1745 def: Pat<(add I64:$Rx, (Su<Mul> Sext64:$Rs, Sext64:$Rt)),
1746 (M2_dpmpyss_acc_s0 I64:$Rx, (LoReg Sext64:$Rs), (LoReg Sext64:$Rt))>;
1747 def: Pat<(sub I64:$Rx, (Su<Mul> Sext64:$Rs, Sext64:$Rt)),
1748 (M2_dpmpyss_nac_s0 I64:$Rx, (LoReg Sext64:$Rs), (LoReg Sext64:$Rt))>;
1749 def: Pat<(add I64:$Rx, (Su<Mul> (Aext64 I32:$Rs), (Aext64 I32:$Rt))),
1750 (M2_dpmpyuu_acc_s0 I64:$Rx, I32:$Rs, I32:$Rt)>;
1751 def: Pat<(add I64:$Rx, (Su<Mul> (Zext64 I32:$Rs), (Zext64 I32:$Rt))),
1752 (M2_dpmpyuu_acc_s0 I64:$Rx, I32:$Rs, I32:$Rt)>;
1753 def: Pat<(sub I64:$Rx, (Su<Mul> (Aext64 I32:$Rs), (Aext64 I32:$Rt))),
1754 (M2_dpmpyuu_nac_s0 I64:$Rx, I32:$Rs, I32:$Rt)>;
1755 def: Pat<(sub I64:$Rx, (Su<Mul> (Zext64 I32:$Rs), (Zext64 I32:$Rt))),
1756 (M2_dpmpyuu_nac_s0 I64:$Rx, I32:$Rs, I32:$Rt)>;
1844 def: Pat<(fma F32:$Rs, F32:$Rt, F32:$Rx),
1845 (F2_sffma F32:$Rx, F32:$Rs, F32:$Rt)>;
1846 def: Pat<(fma (fneg F32:$Rs), F32:$Rt, F32:$Rx),
1847 (F2_sffms F32:$Rx, F32:$Rs, F32:$Rt)>;
1851 def: Pat<(add V2I32:$Rx, (mul V2I32:$Rs, V2I32:$Rt)),
1852 (PS_vmulw_acc V2I32:$Rx, V2I32:$Rs, V2I32:$Rt)>;
2491 : Pat<(Store Value:$Rt, I32:$Rx, Offset:$s4),
2492 (MI I32:$Rx, imm:$s4, Value:$Rt)>;