Lines Matching refs:OldMI
109 bool changeStore(MachineInstr *OldMI, MachineOperand ImmOp,
111 bool changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum);
561 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, in changeLoad() argument
564 MachineBasicBlock *BB = OldMI->getParent(); in changeLoad()
565 auto UsePos = MachineBasicBlock::iterator(OldMI); in changeLoad()
569 unsigned OpEnd = OldMI->getNumOperands(); in changeLoad()
573 if (HII->getAddrMode(*OldMI) == HexagonII::BaseRegOffset) { in changeLoad()
574 short NewOpCode = HII->changeAddrMode_rr_ur(*OldMI); in changeLoad()
576 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); in changeLoad()
577 MIB.add(OldMI->getOperand(0)); in changeLoad()
578 MIB.add(OldMI->getOperand(2)); in changeLoad()
579 MIB.add(OldMI->getOperand(3)); in changeLoad()
583 } else if (HII->getAddrMode(*OldMI) == HexagonII::BaseImmOffset && in changeLoad()
584 OldMI->getOperand(2).isImm()) { in changeLoad()
585 short NewOpCode = HII->changeAddrMode_io_abs(*OldMI); in changeLoad()
587 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)) in changeLoad()
588 .add(OldMI->getOperand(0)); in changeLoad()
590 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm(); in changeLoad()
598 LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); in changeLoad()
601 if (OldMI->getOperand(3).isImm() && OldMI->getOperand(3).getImm() == 0) { in changeLoad()
602 short NewOpCode = HII->changeAddrMode_rr_io(*OldMI); in changeLoad()
604 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); in changeLoad()
605 MIB.add(OldMI->getOperand(0)); in changeLoad()
606 MIB.add(OldMI->getOperand(1)); in changeLoad()
610 LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); in changeLoad()
617 MIB.add(OldMI->getOperand(i)); in changeLoad()
622 bool HexagonOptAddrMode::changeStore(MachineInstr *OldMI, MachineOperand ImmOp, in changeStore() argument
626 unsigned OpEnd = OldMI->getNumOperands(); in changeStore()
627 MachineBasicBlock *BB = OldMI->getParent(); in changeStore()
628 auto UsePos = MachineBasicBlock::iterator(OldMI); in changeStore()
633 if (HII->getAddrMode(*OldMI) == HexagonII::BaseRegOffset) { in changeStore()
634 short NewOpCode = HII->changeAddrMode_rr_ur(*OldMI); in changeStore()
636 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); in changeStore()
637 MIB.add(OldMI->getOperand(1)); in changeStore()
638 MIB.add(OldMI->getOperand(2)); in changeStore()
640 MIB.add(OldMI->getOperand(3)); in changeStore()
643 } else if (HII->getAddrMode(*OldMI) == HexagonII::BaseImmOffset) { in changeStore()
644 short NewOpCode = HII->changeAddrMode_io_abs(*OldMI); in changeStore()
646 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); in changeStore()
648 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(1).getImm(); in changeStore()
650 MIB.add(OldMI->getOperand(2)); in changeStore()
654 } else if (ImmOpNum == 1 && OldMI->getOperand(2).getImm() == 0) { in changeStore()
655 short NewOpCode = HII->changeAddrMode_rr_io(*OldMI); in changeStore()
657 MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); in changeStore()
658 MIB.add(OldMI->getOperand(0)); in changeStore()
664 LLVM_DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); in changeStore()
668 MIB.add(OldMI->getOperand(i)); in changeStore()