Lines Matching +full:max +full:- +full:rt
1 //===- HexagonIntrinsicsV5.td - V5 Instruction intrinsics --*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
41 // Rdd=vmpyhsu(Rs,Rt)[:<<1]:sat
45 // Rxx+=vmpyhsu(Rs,Rt)[:<<1]:sat
50 // Rdd=vpmpyh(Rs,Rt)
52 // Rxx[^]=vpmpyh(Rs,Rt)
56 // Rdd=pmpyw(Rs,Rt)
58 // Rxx^=pmpyw(Rs,Rt)
61 //Rxx^=asr(Rss,Rt)
63 //Rxx^=asl(Rss,Rt)
65 //Rxx^=lsr(Rss,Rt)
67 //Rxx^=lsl(Rss,Rt)
154 // Rdd=vcnegh(Rss,Rt)
182 // Rxx+=vrcrotate(Rss,Rt,#u2)
194 // ALU64 - Vector min/max byte
281 // XTYPE / ALU / Logical-logical Words.
302 // Rd=[cround|round](Rs,Rt)[:sat]
328 // Rdd=vmpyb[s]u(Rs,Rt)
332 // Rxx+=vmpyb[s]u(Rs,Rt)
370 // Compare floating-point value
381 // Create floating-point value