1288       Register Src1Reg = MI.getOperand(1).getReg();  in expandPostRAPseudo()  local
1290       Register Src1SubHi = HRI.getSubReg(Src1Reg, Hexagon::isub_hi);  in expandPostRAPseudo()
1291       Register Src1SubLo = HRI.getSubReg(Src1Reg, Hexagon::isub_lo);  in expandPostRAPseudo()
1312       Register Src1Reg = MI.getOperand(1).getReg();  in expandPostRAPseudo()  local
1315       Register Src1SubHi = HRI.getSubReg(Src1Reg, Hexagon::isub_hi);  in expandPostRAPseudo()
1316       Register Src1SubLo = HRI.getSubReg(Src1Reg, Hexagon::isub_lo);  in expandPostRAPseudo()
3427   Register DstReg, SrcReg, Src1Reg, Src2Reg;  in getCompoundCandidateGroup()  local
3442     Src1Reg = MI.getOperand(1).getReg();  in getCompoundCandidateGroup()
3446         isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg))  in getCompoundCandidateGroup()
3479     Src1Reg = MI.getOperand(1).getReg();  in getCompoundCandidateGroup()
3483         isIntRegForSubInst(Src1Reg) && (MI.getOperand(2).getImm() == 0))  in getCompoundCandidateGroup()
3494     Src1Reg = MI.getOperand(0).getReg();  in getCompoundCandidateGroup()
3495     if (Hexagon::PredRegsRegClass.contains(Src1Reg) &&  in getCompoundCandidateGroup()
3496         (Hexagon::P0 == Src1Reg || Hexagon::P1 == Src1Reg))  in getCompoundCandidateGroup()
3925   Register DstReg, SrcReg, Src1Reg, Src2Reg;  in getDuplexCandidateGroup()  local
4063     Src1Reg = MI.getOperand(0).getReg();  in getDuplexCandidateGroup()
4065     if (Hexagon::IntRegsRegClass.contains(Src1Reg) &&  in getDuplexCandidateGroup()
4067         HRI.getStackRegister() == Src1Reg && MI.getOperand(1).isImm() &&  in getDuplexCandidateGroup()
4071     if (isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg) &&  in getDuplexCandidateGroup()
4079     Src1Reg = MI.getOperand(0).getReg();  in getDuplexCandidateGroup()
4081     if (isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg) &&  in getDuplexCandidateGroup()
4097     Src1Reg = MI.getOperand(0).getReg();  in getDuplexCandidateGroup()
4099     if (isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg) &&  in getDuplexCandidateGroup()
4107     Src1Reg = MI.getOperand(0).getReg();  in getDuplexCandidateGroup()
4110         Hexagon::IntRegsRegClass.contains(Src1Reg) &&  in getDuplexCandidateGroup()
4111         HRI.getStackRegister() == Src1Reg && MI.getOperand(1).isImm() &&  in getDuplexCandidateGroup()
4118     Src1Reg = MI.getOperand(0).getReg();  in getDuplexCandidateGroup()
4119     if (isIntRegForSubInst(Src1Reg) && MI.getOperand(1).isImm() &&  in getDuplexCandidateGroup()
4127     Src1Reg = MI.getOperand(0).getReg();  in getDuplexCandidateGroup()
4128     if (isIntRegForSubInst(Src1Reg) &&  in getDuplexCandidateGroup()
4183     Src1Reg = MI.getOperand(1).getReg();  in getDuplexCandidateGroup()
4185     if (isIntRegForSubInst(DstReg) && (DstReg == Src1Reg) &&  in getDuplexCandidateGroup()