Lines Matching refs:Legal
116 setOperationAction(ISD::VECTOR_SHUFFLE, ByteV, Legal);
117 setOperationAction(ISD::VECTOR_SHUFFLE, ByteW, Legal);
127 setOperationAction(ISD::FADD, T, Legal);
128 setOperationAction(ISD::FSUB, T, Legal);
129 setOperationAction(ISD::FMUL, T, Legal);
130 setOperationAction(ISD::FMINNUM, T, Legal);
131 setOperationAction(ISD::FMAXNUM, T, Legal);
136 setOperationAction(ISD::SPLAT_VECTOR, T, Legal);
137 setOperationAction(ISD::SPLAT_VECTOR, T, Legal);
185 setOperationAction(ISD::FP_ROUND, MVT::v64f16, Legal);
187 setOperationAction(ISD::FP_EXTEND, MVT::v64f32, Legal);
188 setOperationAction(ISD::FP_ROUND, MVT::v64f16, Legal);
193 setIndexedLoadAction(ISD::POST_INC, T, Legal);
194 setIndexedStoreAction(ISD::POST_INC, T, Legal);
196 setOperationAction(ISD::ABS, T, Legal);
197 setOperationAction(ISD::AND, T, Legal);
198 setOperationAction(ISD::OR, T, Legal);
199 setOperationAction(ISD::XOR, T, Legal);
200 setOperationAction(ISD::ADD, T, Legal);
201 setOperationAction(ISD::SUB, T, Legal);
202 setOperationAction(ISD::MUL, T, Legal);
203 setOperationAction(ISD::CTPOP, T, Legal);
204 setOperationAction(ISD::CTLZ, T, Legal);
205 setOperationAction(ISD::SELECT, T, Legal);
206 setOperationAction(ISD::SPLAT_VECTOR, T, Legal);
208 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, T, Legal);
209 setOperationAction(ISD::ZERO_EXTEND_VECTOR_INREG, T, Legal);
210 setOperationAction(ISD::BSWAP, T, Legal);
213 setOperationAction(ISD::SMIN, T, Legal);
214 setOperationAction(ISD::SMAX, T, Legal);
216 setOperationAction(ISD::UMIN, T, Legal);
217 setOperationAction(ISD::UMAX, T, Legal);
225 setOperationAction(ISD::MULHS, T, Legal);
226 setOperationAction(ISD::MULHU, T, Legal);
284 setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, T, Legal);
285 setOperationAction(ISD::ZERO_EXTEND_VECTOR_INREG, T, Legal);
297 setOperationAction(ISD::ADD, T, Legal);
298 setOperationAction(ISD::SUB, T, Legal);
394 setOperationAction(ISD::AND, BoolV, Legal);
395 setOperationAction(ISD::OR, BoolV, Legal);
396 setOperationAction(ISD::XOR, BoolV, Legal);
401 setOperationAction(ISD::SIGN_EXTEND_INREG, T, Legal);
404 setOperationAction(ISD::SIGN_EXTEND_INREG, T, Legal);
494 return TargetLoweringBase::Legal;
1939 // Legal on HVX v62+, but lower it here because patterns can't handle multi-