Lines Matching refs:RegVT
857 MVT RegVT = VA.getLocVT();
859 RegVT = VA.getValVT();
861 const TargetRegisterClass *RC = getRegClassFor(RegVT);
863 SDValue Copy = DAG.getCopyFromReg(Chain, dl, VReg, RegVT);
869 assert(RegVT.getSizeInBits() <= 32);
870 SDValue T = DAG.getNode(ISD::AND, dl, RegVT,
871 Copy, DAG.getConstant(1, dl, RegVT));
872 Copy = DAG.getSetCC(dl, MVT::i1, T, DAG.getConstant(0, dl, RegVT),
876 unsigned RegSize = RegVT.getSizeInBits();
878 Subtarget.isHVXVectorType(RegVT));