56     RegisterSubReg(const Register &Reg) : R(Reg), S(0) {}  in RegisterSubReg()
58     bool operator== (const RegisterSubReg &Reg) const {  in operator ==()
59       return R == Reg.R && S == Reg.S;  in operator ==()
62     bool operator< (const RegisterSubReg &Reg) const {  in operator <()
63       return R < Reg.R || (R == Reg.R && S < Reg.S);  in operator <()
70     PrintRegister(RegisterSubReg R, const TargetRegisterInfo &I) : Reg(R), TRI(I) {}  in PrintRegister()
73     RegisterSubReg Reg;  member
80     return OS << printReg(PR.Reg.R, &PR.TRI, PR.Reg.S);  in operator <<()
117     void processPredicateGPR(const RegisterSubReg &Reg);
122     RegisterSubReg getPredRegFor(const RegisterSubReg &Reg);
225 void HexagonGenPredicate::processPredicateGPR(const RegisterSubReg &Reg) {  in processPredicateGPR()  argument
226   LLVM_DEBUG(dbgs() << __func__ << ": " << printReg(Reg.R, TRI, Reg.S) << "\n");  in processPredicateGPR()
229   use_iterator I = MRI->use_begin(Reg.R), E = MRI->use_end();  in processPredicateGPR()
231     LLVM_DEBUG(dbgs() << "Dead reg: " << printReg(Reg.R, TRI, Reg.S) << '\n');  in processPredicateGPR()
232     MachineInstr *DefI = MRI->getVRegDef(Reg.R);  in processPredicateGPR()
244 RegisterSubReg HexagonGenPredicate::getPredRegFor(const RegisterSubReg &Reg) {  in getPredRegFor()  argument
248   assert(Reg.R.isVirtual());  in getPredRegFor()
249   RegToRegMap::iterator F = G2P.find(Reg);  in getPredRegFor()
253   LLVM_DEBUG(dbgs() << __func__ << ": " << PrintRegister(Reg, *TRI));  in getPredRegFor()
254   MachineInstr *DefI = MRI->getVRegDef(Reg.R);  in getPredRegFor()
260     G2P.insert(std::make_pair(Reg, PR));  in getPredRegFor()
275       .addReg(Reg.R, 0, Reg.S);  in getPredRegFor()
276     G2P.insert(std::make_pair(Reg, RegisterSubReg(NewPR)));  in getPredRegFor()
377     RegisterSubReg Reg(MO);  in convertToPredForm()  local
378     if (Reg.S && Reg.S != Hexagon::isub_lo)  in convertToPredForm()
380     if (!PredGPRs.count(Reg))  in convertToPredForm()