1 //===- HexagonGenExtract.cpp ----------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
33 static cl::opt<unsigned> ExtractCutoff("extract-cutoff", cl::init(~0U),
37 // This prevents generating extract instructions that have the offset of 0.
38 // One of the reasons for "extract" is to put a sequence of bits in a regis-
39 // ter, starting at offset 0 (so that these bits can then be used by an
40 // "insert"). If the bits are already at offset 0, it is better not to gene-
43 static cl::opt<bool> NoSR0("extract-nosr0", cl::init(true), cl::Hidden,
44   cl::desc("No extract instruction with offset 0"));
46 static cl::opt<bool> NeedAnd("extract-needand", cl::init(true), cl::Hidden,
100   ConstantInt *CSL = nullptr, *CSR = nullptr, *CM = nullptr;  in INITIALIZE_PASS_DEPENDENCY()  local
101   BasicBlock *BB = In->getParent();  in INITIALIZE_PASS_DEPENDENCY()
102   LLVMContext &Ctx = BB->getContext();  in INITIALIZE_PASS_DEPENDENCY()
107   bool Match = match(In, m_And(m_Shl(m_LShr(m_Value(BF), m_ConstantInt(CSR)),  in INITIALIZE_PASS_DEPENDENCY()
114     Match = match(In, m_And(m_Shl(m_AShr(m_Value(BF), m_ConstantInt(CSR)),  in INITIALIZE_PASS_DEPENDENCY()
121     CSR = ConstantInt::get(Type::getInt32Ty(Ctx), 0);  in INITIALIZE_PASS_DEPENDENCY()
131     Match = match(In, m_And(m_LShr(m_Value(BF), m_ConstantInt(CSR)),  in INITIALIZE_PASS_DEPENDENCY()
138     Match = match(In, m_And(m_AShr(m_Value(BF), m_ConstantInt(CSR)),  in INITIALIZE_PASS_DEPENDENCY()
145     Match = match(In, m_Shl(m_LShr(m_Value(BF), m_ConstantInt(CSR)),  in INITIALIZE_PASS_DEPENDENCY()
152     Match = match(In, m_Shl(m_AShr(m_Value(BF), m_ConstantInt(CSR)),  in INITIALIZE_PASS_DEPENDENCY()
158   Type *Ty = BF->getType();  in INITIALIZE_PASS_DEPENDENCY()
159   if (!Ty->isIntegerTy())  in INITIALIZE_PASS_DEPENDENCY()
161   unsigned BW = Ty->getPrimitiveSizeInBits();  in INITIALIZE_PASS_DEPENDENCY()
165   uint32_t SR = CSR->getZExtValue();  in INITIALIZE_PASS_DEPENDENCY()
166   uint32_t SL = CSL->getZExtValue();  in INITIALIZE_PASS_DEPENDENCY()
178   // CM is the shifted-left mask. Shift it back right to remove the zero  in INITIALIZE_PASS_DEPENDENCY()
179   // bits on least-significant positions.  in INITIALIZE_PASS_DEPENDENCY()
180   APInt M = CM->getValue().lshr(SL);  in INITIALIZE_PASS_DEPENDENCY()
185   uint32_t U = BW - std::max(SL, SR);  in INITIALIZE_PASS_DEPENDENCY()
193   // and-ed with. The extract operation will copy these bits, and so the  in INITIALIZE_PASS_DEPENDENCY()
200     APInt C = APInt::getHighBitsSet(BW, BW-U);  in INITIALIZE_PASS_DEPENDENCY()
214   Module *Mod = BB->getParent()->getParent();  in INITIALIZE_PASS_DEPENDENCY()
218     NewIn = IRB.CreateShl(NewIn, SL, CSL->getName());  in INITIALIZE_PASS_DEPENDENCY()
219   In->replaceAllUsesWith(NewIn);  in INITIALIZE_PASS_DEPENDENCY()
226   // Depth-first, bottom-up traversal.  in visitBlock()
227   for (auto *DTN : children<DomTreeNode*>(DT->getNode(B)))  in visitBlock()
228     Changed |= visitBlock(DTN->getBlock());  in visitBlock()
234   BasicBlock::iterator I = std::prev(B->end()), NextI, Begin = B->begin();  in visitBlock()
260   // Traverse the function bottom-up, to see super-expressions before their  in runOnFunction()
261   // sub-expressions.  in runOnFunction()