Lines Matching full:hexagon
1 //===-- HexagonAsmParser.cpp - Parse Hexagon asm to MCInst instructions----===//
83 static cl::opt<bool> AddBuildAttributes("hexagon-add-build-attributes");
163 MCB.setOpcode(Hexagon::BUNDLE); in HexagonAsmParser()
194 /// HexagonOperand - Instances of this class represent a parsed Hexagon machine
367 return getReg() == Hexagon::SGP1_0; in issgp10Const()
525 if (getSTI().hasFeature(Hexagon::FeatureMemNoShuf)) in matchBundleOptions()
713 /// ParseDirective parses the Hexagon specific directives
745 // end of the section. Only legacy hexagon-gcc created assembly code in ParseDirectiveSubsection()
787 // Hexagon's .lcomm:
871 if (HexagonMCRegisterClasses[Hexagon::V62RegsRegClassID].contains(MatchNum)) in RegisterMatchesArch()
872 if (!getSTI().hasFeature(Hexagon::ArchV62)) in RegisterMatchesArch()
935 case Hexagon::P0: in parseOperand()
936 case Hexagon::P1: in parseOperand()
937 case Hexagon::P2: in parseOperand()
938 case Hexagon::P3: in parseOperand()
1058 if (DotReg != Hexagon::NoRegister && RegisterMatchesArch(DotReg)) { in tryParseRegister()
1078 if (ColonReg != Hexagon::NoRegister && RegisterMatchesArch(DotReg)) { in tryParseRegister()
1386 case Hexagon::J2_trap1: in processInstruction()
1387 if (!getSTI().hasFeature(Hexagon::ArchV65)) { in processInstruction()
1390 if (Rx.getReg() != Hexagon::R0 || Ry.getReg() != Hexagon::R0) { in processInstruction()
1397 case Hexagon::A2_iconst: { in processInstruction()
1398 Inst.setOpcode(Hexagon::A2_addi); in processInstruction()
1405 Inst.addOperand(MCOperand::createReg(Hexagon::R0)); in processInstruction()
1409 case Hexagon::M4_mpyrr_addr: in processInstruction()
1410 case Hexagon::S4_addi_asl_ri: in processInstruction()
1411 case Hexagon::S4_addi_lsr_ri: in processInstruction()
1412 case Hexagon::S4_andi_asl_ri: in processInstruction()
1413 case Hexagon::S4_andi_lsr_ri: in processInstruction()
1414 case Hexagon::S4_ori_asl_ri: in processInstruction()
1415 case Hexagon::S4_ori_lsr_ri: in processInstruction()
1416 case Hexagon::S4_or_andix: in processInstruction()
1417 case Hexagon::S4_subi_asl_ri: in processInstruction()
1418 case Hexagon::S4_subi_lsr_ri: { in processInstruction()
1426 case Hexagon::C2_cmpgei: { in processInstruction()
1432 Inst.setOpcode(Hexagon::C2_cmpgti); in processInstruction()
1436 case Hexagon::C2_cmpgeui: { in processInstruction()
1446 TmpInst.setOpcode(Hexagon::C2_cmpeq); in processInstruction()
1456 Inst.setOpcode(Hexagon::C2_cmpgtui); in processInstruction()
1462 case Hexagon::A2_tfrp: { in processInstruction()
1467 Inst.setOpcode(Hexagon::A2_combinew); in processInstruction()
1471 case Hexagon::A2_tfrpt: in processInstruction()
1472 case Hexagon::A2_tfrpf: { in processInstruction()
1477 Inst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrpt) in processInstruction()
1478 ? Hexagon::C2_ccombinewt in processInstruction()
1479 : Hexagon::C2_ccombinewf); in processInstruction()
1482 case Hexagon::A2_tfrptnew: in processInstruction()
1483 case Hexagon::A2_tfrpfnew: { in processInstruction()
1488 Inst.setOpcode((Inst.getOpcode() == Hexagon::A2_tfrptnew) in processInstruction()
1489 ? Hexagon::C2_ccombinewnewt in processInstruction()
1490 : Hexagon::C2_ccombinewnewf); in processInstruction()
1495 case Hexagon::V6_vassignp: { in processInstruction()
1500 Inst.setOpcode(Hexagon::V6_vcombine); in processInstruction()
1505 case Hexagon::CONST32: in processInstruction()
1509 case Hexagon::CONST64: in processInstruction()
1598 TmpInst.setOpcode(Hexagon::L2_loadrigp); in processInstruction()
1600 TmpInst.setOpcode(Hexagon::L2_loadrdgp); in processInstruction()
1611 case Hexagon::A2_tfrpi: { in processInstruction()
1618 Inst = makeCombineInst(Hexagon::A2_combineii, Rdd, imm, MO); in processInstruction()
1623 case Hexagon::TFRI64_V4: { in processInstruction()
1638 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, imm, imm2); in processInstruction()
1642 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, imm, MO); in processInstruction()
1648 case Hexagon::TFRI64_V2_ext: { in processInstruction()
1658 Inst = makeCombineInst(Hexagon::A2_combineii, Rdd, MO1, MO2); in processInstruction()
1663 case Hexagon::A4_combineii: { in processInstruction()
1673 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, MO1, MO2); in processInstruction()
1677 case Hexagon::S2_tableidxb_goodsyntax: in processInstruction()
1678 Inst.setOpcode(Hexagon::S2_tableidxb); in processInstruction()
1681 case Hexagon::S2_tableidxh_goodsyntax: { in processInstruction()
1691 TmpInst.setOpcode(Hexagon::S2_tableidxh); in processInstruction()
1701 case Hexagon::S2_tableidxw_goodsyntax: { in processInstruction()
1711 TmpInst.setOpcode(Hexagon::S2_tableidxw); in processInstruction()
1721 case Hexagon::S2_tableidxd_goodsyntax: { in processInstruction()
1731 TmpInst.setOpcode(Hexagon::S2_tableidxd); in processInstruction()
1741 case Hexagon::M2_mpyui: in processInstruction()
1742 Inst.setOpcode(Hexagon::M2_mpyi); in processInstruction()
1744 case Hexagon::M2_mpysmi: { in processInstruction()
1760 TmpInst.setOpcode(Hexagon::M2_mpysin); in processInstruction()
1762 TmpInst.setOpcode(Hexagon::M2_mpysip); in processInstruction()
1770 case Hexagon::S2_asr_i_r_rnd_goodsyntax: { in processInstruction()
1778 TmpInst.setOpcode(Hexagon::A2_tfr); in processInstruction()
1788 TmpInst.setOpcode(Hexagon::S2_asr_i_r_rnd); in processInstruction()
1799 case Hexagon::S2_asr_i_p_rnd_goodsyntax: { in processInstruction()
1816 TmpInst.setOpcode(Hexagon::A2_combinew); in processInstruction()
1826 Inst.setOpcode(Hexagon::S2_asr_i_p_rnd); in processInstruction()
1831 case Hexagon::A4_boundscheck: { in processInstruction()
1835 Inst.setOpcode(Hexagon::A4_boundscheck_hi); in processInstruction()
1840 Inst.setOpcode(Hexagon::A4_boundscheck_lo); in processInstruction()
1848 case Hexagon::A2_addsp: { in processInstruction()
1852 Inst.setOpcode(Hexagon::A2_addsph); in processInstruction()
1857 Inst.setOpcode(Hexagon::A2_addspl); in processInstruction()
1865 case Hexagon::M2_vrcmpys_s1: { in processInstruction()
1869 Inst.setOpcode(Hexagon::M2_vrcmpys_s1_h); in processInstruction()
1874 Inst.setOpcode(Hexagon::M2_vrcmpys_s1_l); in processInstruction()
1882 case Hexagon::M2_vrcmpys_acc_s1: { in processInstruction()
1889 TmpInst.setOpcode(Hexagon::M2_vrcmpys_acc_s1_h); in processInstruction()
1894 TmpInst.setOpcode(Hexagon::M2_vrcmpys_acc_s1_l); in processInstruction()
1908 case Hexagon::M2_vrcmpys_s1rp: { in processInstruction()
1912 Inst.setOpcode(Hexagon::M2_vrcmpys_s1rp_h); in processInstruction()
1917 Inst.setOpcode(Hexagon::M2_vrcmpys_s1rp_l); in processInstruction()
1925 case Hexagon::S5_asrhub_rnd_sat_goodsyntax: { in processInstruction()
1932 Inst.setOpcode(Hexagon::S2_vsathub); in processInstruction()
1938 Inst.setOpcode(Hexagon::S5_asrhub_rnd_sat); in processInstruction()
1943 case Hexagon::S5_vasrhrnd_goodsyntax: { in processInstruction()
1960 TmpInst.setOpcode(Hexagon::A2_combinew); in processInstruction()
1970 Inst.setOpcode(Hexagon::S5_vasrhrnd); in processInstruction()
1975 case Hexagon::A2_not: { in processInstruction()
1979 TmpInst.setOpcode(Hexagon::A2_subri); in processInstruction()
1987 case Hexagon::PS_loadrubabs: in processInstruction()
1989 Inst.setOpcode(Hexagon::L2_loadrubgp); in processInstruction()
1991 case Hexagon::PS_loadrbabs: in processInstruction()
1993 Inst.setOpcode(Hexagon::L2_loadrbgp); in processInstruction()
1995 case Hexagon::PS_loadruhabs: in processInstruction()
1997 Inst.setOpcode(Hexagon::L2_loadruhgp); in processInstruction()
1999 case Hexagon::PS_loadrhabs: in processInstruction()
2001 Inst.setOpcode(Hexagon::L2_loadrhgp); in processInstruction()
2003 case Hexagon::PS_loadriabs: in processInstruction()
2005 Inst.setOpcode(Hexagon::L2_loadrigp); in processInstruction()
2007 case Hexagon::PS_loadrdabs: in processInstruction()
2009 Inst.setOpcode(Hexagon::L2_loadrdgp); in processInstruction()
2011 case Hexagon::PS_storerbabs: in processInstruction()
2013 Inst.setOpcode(Hexagon::S2_storerbgp); in processInstruction()
2015 case Hexagon::PS_storerhabs: in processInstruction()
2017 Inst.setOpcode(Hexagon::S2_storerhgp); in processInstruction()
2019 case Hexagon::PS_storerfabs: in processInstruction()
2021 Inst.setOpcode(Hexagon::S2_storerfgp); in processInstruction()
2023 case Hexagon::PS_storeriabs: in processInstruction()
2025 Inst.setOpcode(Hexagon::S2_storerigp); in processInstruction()
2027 case Hexagon::PS_storerdabs: in processInstruction()
2029 Inst.setOpcode(Hexagon::S2_storerdgp); in processInstruction()
2031 case Hexagon::PS_storerbnewabs: in processInstruction()
2033 Inst.setOpcode(Hexagon::S2_storerbnewgp); in processInstruction()
2035 case Hexagon::PS_storerhnewabs: in processInstruction()
2037 Inst.setOpcode(Hexagon::S2_storerhnewgp); in processInstruction()
2039 case Hexagon::PS_storerinewabs: in processInstruction()
2041 Inst.setOpcode(Hexagon::S2_storerinewgp); in processInstruction()
2043 case Hexagon::A2_zxtb: { in processInstruction()
2044 Inst.setOpcode(Hexagon::A2_andir); in processInstruction()