190 static unsigned getOppositeBranchOpc(unsigned Opcode) {  in getOppositeBranchOpc()  argument
191   switch (Opcode) {  in getOppositeBranchOpc()
405   unsigned Opcode = 0;  in storeRegToStackSlot()  local
408     Opcode = CSKY::ST32W; // Optimize for 16bit  in storeRegToStackSlot()
410     Opcode = CSKY::SPILL_CARRY;  in storeRegToStackSlot()
413     Opcode = CSKY::FST_S;  in storeRegToStackSlot()
415     Opcode = CSKY::FST_D;  in storeRegToStackSlot()
417     Opcode = CSKY::f2FST_S;  in storeRegToStackSlot()
419     Opcode = CSKY::f2FST_D;  in storeRegToStackSlot()
428   BuildMI(MBB, I, DL, get(Opcode))  in storeRegToStackSlot()
449   unsigned Opcode = 0;  in loadRegFromStackSlot()  local
452     Opcode = CSKY::LD32W;  in loadRegFromStackSlot()
454     Opcode = CSKY::RESTORE_CARRY;  in loadRegFromStackSlot()
457     Opcode = CSKY::FLD_S;  in loadRegFromStackSlot()
459     Opcode = CSKY::FLD_D;  in loadRegFromStackSlot()
461     Opcode = CSKY::f2FLD_S;  in loadRegFromStackSlot()
463     Opcode = CSKY::f2FLD_D;  in loadRegFromStackSlot()
472   BuildMI(MBB, I, DL, get(Opcode), DestReg)  in loadRegFromStackSlot()
521   unsigned Opcode = 0;  in copyPhysReg()  local
523     Opcode = STI.hasE2() ? CSKY::MOV32 : CSKY::MOV16;  in copyPhysReg()
525     Opcode = CSKY::FMOV_S;  in copyPhysReg()
527     Opcode = CSKY::f2FMOV_S;  in copyPhysReg()
529     Opcode = CSKY::FMOV_D;  in copyPhysReg()
531     Opcode = CSKY::f2FMOV_D;  in copyPhysReg()
534     Opcode = CSKY::FMFVRL;  in copyPhysReg()
537     Opcode = CSKY::f2FMFVRL;  in copyPhysReg()
540     Opcode = CSKY::FMFVRL_D;  in copyPhysReg()
543     Opcode = CSKY::f2FMFVRL_D;  in copyPhysReg()
546     Opcode = CSKY::FMTVRL;  in copyPhysReg()
549     Opcode = CSKY::f2FMTVRL;  in copyPhysReg()
552     Opcode = CSKY::FMTVRL_D;  in copyPhysReg()
555     Opcode = CSKY::f2FMTVRL_D;  in copyPhysReg()
562   BuildMI(MBB, I, DL, get(Opcode), DestReg)  in copyPhysReg()