Lines Matching refs:Cond
36 SmallVectorImpl<MachineOperand> &Cond) { in parseCondBranch() argument
41 Cond.push_back(MachineOperand::CreateImm(LastInst.getOpcode())); in parseCondBranch()
42 Cond.push_back(LastInst.getOperand(0)); in parseCondBranch()
48 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
51 Cond.clear(); in analyzeBranch()
97 parseCondBranch(*I, TBB, Cond); in analyzeBranch()
104 parseCondBranch(*std::prev(I), TBB, Cond); in analyzeBranch()
156 ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const { in insertBranch() argument
162 assert((Cond.size() == 2 || Cond.size() == 0) && in insertBranch()
166 if (Cond.empty()) { in insertBranch()
174 unsigned Opc = Cond[0].getImm(); in insertBranch()
175 MachineInstr &CondMI = *BuildMI(&MBB, DL, get(Opc)).add(Cond[1]).addMBB(TBB); in insertBranch()
218 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
219 assert((Cond.size() == 2) && "Invalid branch condition!"); in reverseBranchCondition()
220 Cond[0].setImm(getOppositeBranchOpc(Cond[0].getImm())); in reverseBranchCondition()