Lines Matching refs:op
34 multiclass F2_XYZ_T<bits<6> sop, string op, PatFrag opnode> {
35 def _S : F2_XYZ<0b00000, sop, op#".32"#"\t$vrz, $vrx, $vry",
39 def _D : F2_XYZ<0b00001, sop, op#".64"#"\t$vrz, $vrx, $vry",
45 multiclass F2_XYZZ_T<bits<6> sop, string op, PatFrag opnode> {
46 def _S : F2_XYZ<0b00000, sop, op#".32"#"\t$vrz, $vrx, $vry",
50 def _D : F2_XYZ<0b00001, sop, op#".64"#"\t$vrz, $vrx, $vry",
56 class F2_XZ<bits<5> datatype, RegisterOperand regtype, bits<6> sop, string op, SDNode opnode>
57 : F2_XYZ<datatype, sop, !strconcat(op, "\t$vrz, $vrx"),
61 class F2_XZ_SET<bits<5> datatype, RegisterOperand regtype, bits<6> sop, string op>
62 : F2_XYZ<datatype, sop, !strconcat(op, "\t$vrz, $vrx"),
66 class F2_XZ_P<bits<5> datatype, bits<6> sop, string op, list<dag> pattern = [],
68 : F2_XYZ<datatype, sop, op#"\t$vrz, $vrx", outs, ins, pattern>;
71 multiclass F2_XZ_RM<bits<5> datatype, bits<4> sop, string op, dag outs, dag ins> {
72 def _RN : F2_XZ_P<datatype, {sop, 0b00}, op#".rn", [], outs, ins>;
73 def _RZ : F2_XZ_P<datatype, {sop, 0b01}, op#".rz", [], outs, ins>;
74 def _RPI : F2_XZ_P<datatype, {sop, 0b10}, op#".rpi", [], outs, ins>;
75 def _RNI : F2_XZ_P<datatype, {sop, 0b11}, op#".rni", [], outs, ins>;
78 multiclass F2_XZ_T<bits<6> sop, string op, SDNode opnode> {
79 def _S : F2_XZ<0b00000, FPR32Op, sop, op#".32", opnode>;
81 def _D : F2_XZ<0b00001, FPR64Op, sop, op#".64", opnode>;
84 multiclass F2_XZ_SET_T<bits<6> sop, string op, string suffix = ""> {
85 def _S : F2_XZ_SET<0b00000, FPR32Op, sop, op#".32"#suffix>;
87 def _D : F2_XZ_SET<0b00001, FPR64Op, sop, op#".64"#suffix>;
92 class F2_CXY<bits<5> datatype, RegisterOperand regtype, bits<6> sop, string op>
93 : F2_XYZ<datatype, sop, !strconcat(op, "\t$vrx, $vry"),
97 multiclass F2_CXY_T<bits<6> sop, string op> {
98 def _S : F2_CXY<0b00000, FPR32Op, sop, op#".32">;
100 def _D : F2_CXY<0b00001, FPR64Op, sop, op#".64">;
105 class F2_CX<bits<5> datatype, RegisterOperand regtype, bits<6> sop, string op>
106 : F2_XYZ<datatype, sop, !strconcat(op, "\t$vrx"),
110 multiclass F2_CX_T<bits<6> sop, string op> {
111 def _S : F2_CX<0b00000, FPR32Op, sop, op#".32">;
113 def _D : F2_CX<0b00001, FPR64Op, sop, op#".64">;
117 class F2_LDST<bits<2> datatype, bits<1> sop, string op, dag outs, dag ins>
119 !strconcat(op, "\t$vrz, ($rx, ${imm8})"), []> {
134 class F2_LDST_S<bits<1> sop, string op, dag outs, dag ins>
135 : F2_LDST<0b00, sop, op#".32", outs, ins>;
136 class F2_LDST_D<bits<1> sop, string op, dag outs, dag ins>
137 : F2_LDST<0b01, sop, op#".64", outs, ins>;
139 class F2_LDSTM<bits<2> datatype, bits<1> sop, bits<3> sop2, string op, dag outs, dag ins>
141 !strconcat(op, "\t$regs, (${rx})"), []> {
154 class F2_LDSTM_S<bits<1> sop, bits<3> sop2, string op, dag outs, dag ins>
155 : F2_LDSTM<0b00, sop, sop2, op#".32", outs, ins>;
156 class F2_LDSTM_D<bits<1> sop, bits<3> sop2, string op, dag outs, dag ins>
157 : F2_LDSTM<0b01, sop, sop2, op#".64", outs, ins>;
160 class F2_LDSTR<bits<2> datatype, bits<1> sop, string op, dag outs, dag ins>
162 op#"\t$rz, ($rx, $ry << ${imm})", []> {
178 class F2_LDSTR_S<bits<1> sop, string op, dag outs, dag ins>
179 : F2_LDSTR<0b00, sop, op#".32", outs, ins>;
180 class F2_LDSTR_D<bits<1> sop, string op, dag outs, dag ins>
181 : F2_LDSTR<0b01, sop, op#".64", outs, ins>;
183 class F2_CXYZ<bits<5> datatype, RegisterOperand regtype, bits<6> sop, string op>
184 : F2_XYZ<datatype, sop, !strconcat(op, "\t$vrz, $vrx, $vry"),
187 multiclass F2_CXYZ_T<bits<6> sop, string op> {
188 def _S : F2_CXYZ<0b00000, FPR32Op, sop, op#".32">;
190 def _D : F2_CXYZ<0b00001, FPR64Op, sop, op#".64">;
193 class F2_LRW<bits<2> datatype, bits<1> sop, string op, dag outs, dag ins>
195 !strconcat(op, "\t$vrz, ${imm8}"), []> {