1 //===---- CSKYAsmParser.cpp - Parse CSKY assembly to MCInst instructions --===//
40 #define DEBUG_TYPE "csky-asm-parser"
50     EnableCompressedInst("enable-csky-asm-compressed-inst", cl::Hidden,
333   bool isRegSeq() const { return isRegSeqTemplate<CSKY::R0, CSKY::R31>(); }  in isRegSeq()
336     return isRegSeqTemplate<CSKY::F0_32, CSKY::F15_32>();  in isRegSeqV1()
340     return isRegSeqTemplate<CSKY::F0_32, CSKY::F31_32>();  in isRegSeqV2()
348       if (from != CSKY::R4 && from != CSKY::R15 && from != CSKY::R16 &&  in isLegalRegList()
349           from != CSKY::R28)  in isLegalRegList()
354       if (from != CSKY::R4 && from != CSKY::R16)  in isLegalRegList()
357       if (from == CSKY::R4 && to > CSKY::R4 && to < CSKY::R12)  in isLegalRegList()
359       else if (from == CSKY::R16 && to > CSKY::R16 && to < CSKY::R18)  in isLegalRegList()
586     if (ListFrom == ListTo && ListFrom == CSKY::R15)  in getListValue()
588     else if (ListFrom == ListTo && ListFrom == CSKY::R28)  in getListValue()
590     else if (ListFrom == CSKY::R4)  in getListValue()
592     else if (ListFrom == CSKY::R16)  in getListValue()
645   assert(Reg >= CSKY::F0_32 && Reg <= CSKY::F31_32 && "Invalid register");  in convertFPR32ToFPR64()
646   return Reg - CSKY::F0_32 + CSKY::F0_64;  in convertFPR32ToFPR64()
830   if (Inst.getOpcode() == CSKY::PseudoLRW16)  in processLRW()
831     Opcode = CSKY::LRW16;  in processLRW()
833     Opcode = CSKY::LRW32;  in processLRW()
837         Inst.getOperand(0).getReg() <= CSKY::R7) {  in processLRW()
838       Opcode = CSKY::MOVI16;  in processLRW()
839     } else if (getSTI().hasFeature(CSKY::HasE2) &&  in processLRW()
841       Opcode = CSKY::MOVI32;  in processLRW()
880     Inst.setOpcode(CSKY::JSRI32);  in processJSRI()
886     Inst.setOpcode(CSKY::JBSR32);  in processJSRI()
901     Inst.setOpcode(CSKY::JMPI32);  in processJMPI()
907     Inst.setOpcode(CSKY::JBR32);  in processJMPI()
922   case CSKY::LDQ32:  in processInstruction()
923   case CSKY::STQ32:  in processInstruction()
924     if (Inst.getOperand(1).getReg() != CSKY::R4 ||  in processInstruction()
925         Inst.getOperand(2).getReg() != CSKY::R7) {  in processInstruction()
928     Inst.setOpcode(Inst.getOpcode() == CSKY::LDQ32 ? CSKY::LDM32 : CSKY::STM32);  in processInstruction()
930   case CSKY::SEXT32:  in processInstruction()
931   case CSKY::ZEXT32:  in processInstruction()
935   case CSKY::INS32:  in processInstruction()
939   case CSKY::IDLY32:  in processInstruction()
943   case CSKY::ADDC32:  in processInstruction()
944   case CSKY::SUBC32:  in processInstruction()
945   case CSKY::ADDC16:  in processInstruction()
946   case CSKY::SUBC16:  in processInstruction()
949     Inst.insert(std::next(Inst.begin()), MCOperand::createReg(CSKY::C));  in processInstruction()
950     Inst.insert(Inst.end(), MCOperand::createReg(CSKY::C));  in processInstruction()
952   case CSKY::CMPNEI32:  in processInstruction()
953   case CSKY::CMPNEI16:  in processInstruction()
954   case CSKY::CMPNE32:  in processInstruction()
955   case CSKY::CMPNE16:  in processInstruction()
956   case CSKY::CMPHSI32:  in processInstruction()
957   case CSKY::CMPHSI16:  in processInstruction()
958   case CSKY::CMPHS32:  in processInstruction()
959   case CSKY::CMPHS16:  in processInstruction()
960   case CSKY::CMPLTI32:  in processInstruction()
961   case CSKY::CMPLTI16:  in processInstruction()
962   case CSKY::CMPLT32:  in processInstruction()
963   case CSKY::CMPLT16:  in processInstruction()
964   case CSKY::BTSTI32:  in processInstruction()
966     Inst.insert(Inst.begin(), MCOperand::createReg(CSKY::C));  in processInstruction()
968   case CSKY::MVCV32:  in processInstruction()
970     Inst.insert(Inst.end(), MCOperand::createReg(CSKY::C));  in processInstruction()
972   case CSKY::PseudoLRW16:  in processInstruction()
973   case CSKY::PseudoLRW32:  in processInstruction()
975   case CSKY::PseudoJSRI32:  in processInstruction()
977   case CSKY::PseudoJMPI32:  in processInstruction()
979   case CSKY::JBSR32:  in processInstruction()
980   case CSKY::JBR16:  in processInstruction()
981   case CSKY::JBT16:  in processInstruction()
982   case CSKY::JBF16:  in processInstruction()
983   case CSKY::JBR32:  in processInstruction()
984   case CSKY::JBT32:  in processInstruction()
985   case CSKY::JBF32:  in processInstruction()
1007   if (Reg == CSKY::NoRegister)  in matchRegisterNameHelper()
1010   return Reg == CSKY::NoRegister;  in matchRegisterNameHelper()
1604     CSKY::ArchKind ID = (Tag == CSKYAttrs::CSKY_ARCH_NAME)  in parseDirectiveAttribute()
1605                             ? CSKY::parseArch(StringValue)  in parseDirectiveAttribute()
1606                             : CSKY::parseCPUArch(StringValue);  in parseDirectiveAttribute()
1607     if (ID == CSKY::ArchKind::INVALID)  in parseDirectiveAttribute()
1627   if (CSKYMCRegisterClasses[CSKY::FPR32RegClassID].contains(Reg)) {  in validateTargetOperandClass()
1633           (Op.Reg.RegNum < CSKY::F0_64 || Op.Reg.RegNum > CSKY::F15_64))  in validateTargetOperandClass()
1636           (Op.Reg.RegNum < CSKY::F0_64 || Op.Reg.RegNum > CSKY::F31_64))  in validateTargetOperandClass()
1642   if (CSKYMCRegisterClasses[CSKY::GPRRegClassID].contains(Reg)) {  in validateTargetOperandClass()
1644       Op.Reg.RegNum = MRI->getEncodingValue(Reg) + CSKY::R0_R1;  in validateTargetOperandClass()