Lines Matching refs:Cond
267 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
305 Cond.clear(); in analyzeBranch()
329 if (Cond.empty()) { in analyzeBranch()
370 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
376 assert(Cond.size() == 1); in analyzeBranch()
385 AVRCC::CondCodes OldBranchCode = (AVRCC::CondCodes)Cond[0].getImm(); in analyzeBranch()
400 ArrayRef<MachineOperand> Cond, in insertBranch() argument
407 assert((Cond.size() == 1 || Cond.size() == 0) && in insertBranch()
410 if (Cond.empty()) { in insertBranch()
420 AVRCC::CondCodes CC = (AVRCC::CondCodes)Cond[0].getImm(); in insertBranch()
470 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
471 assert(Cond.size() == 1 && "Invalid AVR branch condition!"); in reverseBranchCondition()
473 AVRCC::CondCodes CC = static_cast<AVRCC::CondCodes>(Cond[0].getImm()); in reverseBranchCondition()
474 Cond[0].setImm(getOppositeCondition(CC)); in reverseBranchCondition()