Lines Matching refs:addReg
71 .addReg(STI.getTmpRegister(), RegState::Kill)
78 .addReg(STI.getTmpRegister(), RegState::Kill)
82 .addReg(STI.getZeroRegister(), RegState::Kill)
85 .addReg(STI.getZeroRegister(), RegState::Define)
86 .addReg(STI.getZeroRegister(), RegState::Kill)
87 .addReg(STI.getZeroRegister(), RegState::Kill)
109 .addReg(AVR::SP)
126 .addReg(AVR::R29R28, RegState::Kill)
134 .addReg(AVR::R29R28)
157 .addReg(STI.getTmpRegister(), RegState::Kill);
213 .addReg(AVR::R29R28, RegState::Kill)
221 .addReg(AVR::R29R28, RegState::Kill);
283 .addReg(Reg, getKillRegState(IsNotLiveIn))
373 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP);
377 .addReg(AVR::R31R30, RegState::Kill)
381 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP).addReg(AVR::R31R30);
404 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP);
407 .addReg(AVR::R31R30, RegState::Kill)
412 .addReg(AVR::R31R30, RegState::Kill);