Lines Matching refs:TII
55 const AVRInstrInfo &TII = *STI.getInstrInfo();
62 BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs))
70 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr))
74 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), STI.getTmpRegister())
77 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr))
81 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr))
84 BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr))
108 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28)
125 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28)
133 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP)
146 const AVRInstrInfo &TII = *STI.getInstrInfo();
152 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), STI.getZeroRegister());
154 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), STI.getTmpRegister());
155 BuildMI(MBB, MBBI, DL, TII.get(AVR::OUTARr))
158 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), STI.getTmpRegister());
180 const AVRInstrInfo &TII = *STI.getInstrInfo();
212 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28)
220 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP)
254 const TargetInstrInfo &TII = *STI.getInstrInfo();
282 BuildMI(MBB, MI, DL, TII.get(AVR::PUSHRr))
303 const TargetInstrInfo &TII = *STI.getInstrInfo();
311 BuildMI(MBB, MI, DL, TII.get(AVR::POPRd), Reg);
321 const TargetInstrInfo &TII) {
342 MI.setDesc(TII.get(STOpc));
351 const AVRInstrInfo &TII = *STI.getInstrInfo();
359 int Amount = TII.getFrameSize(*MI);
367 if (Opcode == TII.getCallFrameSetupOpcode()) {
373 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP);
376 BuildMI(MBB, MI, DL, TII.get(AVR::SUBIWRdK), AVR::R31R30)
381 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP).addReg(AVR::R31R30);
385 fixStackStores(MBB, MI, TII);
387 assert(Opcode == TII.getCallFrameDestroyOpcode());
404 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP);
406 MachineInstr *New = BuildMI(MBB, MI, DL, TII.get(AddOpcode), AVR::R31R30)
411 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP)