Lines Matching refs:MBB
51 MachineBasicBlock &MBB) const {
52 MachineBasicBlock::iterator MBBI = MBB.begin();
53 DebugLoc DL = (MBBI != MBB.end()) ? MBBI->getDebugLoc() : DebugLoc();
62 BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs))
70 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr))
74 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), STI.getTmpRegister())
77 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr))
81 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr))
84 BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr))
102 (MBBI != MBB.end()) && MBBI->getFlag(MachineInstr::FrameSetup) &&
108 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28)
125 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28)
133 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP)
138 static void restoreStatusRegister(MachineFunction &MF, MachineBasicBlock &MBB) {
142 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
152 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), STI.getZeroRegister());
154 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), STI.getTmpRegister());
155 BuildMI(MBB, MBBI, DL, TII.get(AVR::OUTARr))
158 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), STI.getTmpRegister());
163 MachineBasicBlock &MBB) const {
172 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
184 restoreStatusRegister(MF, MBB);
189 while (MBBI != MBB.begin()) {
212 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28)
220 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP)
223 restoreStatusRegister(MF, MBB);
244 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
251 DebugLoc DL = MBB.findDebugLoc(MI);
252 MachineFunction &MF = *MBB.getParent();
259 bool IsNotLiveIn = !MBB.isLiveIn(Reg);
264 for (const auto &LiveIn : MBB.liveins())
267 MBB.addLiveIn(Reg);
278 MBB.addLiveIn(Reg);
282 BuildMI(MBB, MI, DL, TII.get(AVR::PUSHRr))
294 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
300 DebugLoc DL = MBB.findDebugLoc(MI);
301 const MachineFunction &MF = *MBB.getParent();
311 BuildMI(MBB, MI, DL, TII.get(AVR::POPRd), Reg);
319 static void fixStackStores(MachineBasicBlock &MBB,
324 llvm::make_early_inc_range(llvm::make_range(StartMI, MBB.end()))) {
348 MachineFunction &MF, MachineBasicBlock &MBB,
354 return MBB.erase(MI);
362 return MBB.erase(MI);
373 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP);
376 BuildMI(MBB, MI, DL, TII.get(AVR::SUBIWRdK), AVR::R31R30)
381 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP).addReg(AVR::R31R30);
385 fixStackStores(MBB, MI, TII);
404 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP);
406 MachineInstr *New = BuildMI(MBB, MI, DL, TII.get(AddOpcode), AVR::R31R30)
411 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP)
415 return MBB.erase(MI);