74   Register PredReg;  in ReplaceTailWithBranchTo()  local
75   ARMCC::CondCodes CC = getInstrPredicate(*Tail, PredReg);  in ReplaceTailWithBranchTo()
122   Register PredReg;  in isLegalToSplitMBBAt()  local
123   return getITInstrPredicate(*MBBI, PredReg) == ARMCC::AL;  in isLegalToSplitMBBAt()
313                                   ARMCC::CondCodes Pred, Register PredReg,  in emitT2RegPlusImmediate()  argument
319       .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);  in emitT2RegPlusImmediate()
336         .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);  in emitT2RegPlusImmediate()
343         .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);  in emitT2RegPlusImmediate()
352             .add(predOps(Pred, PredReg))  in emitT2RegPlusImmediate()
364             .add(predOps(Pred, PredReg))  in emitT2RegPlusImmediate()
573     Register PredReg;  in rewriteT2FrameIndex()  local
574     if (Offset == 0 && getInstrPredicate(MI, PredReg) == ARMCC::AL &&  in rewriteT2FrameIndex()
787                                            Register &PredReg) {  in getITInstrPredicate()  argument
791   return getInstrPredicate(MI, PredReg);  in getITInstrPredicate()
805                                             Register &PredReg) {  in getVPTInstrPredicate()  argument
808     PredReg = 0;  in getVPTInstrPredicate()
812   PredReg = MI.getOperand(PIdx+1).getReg();  in getVPTInstrPredicate()