Lines Matching refs:SrcReg
45 MCRegister SrcReg, bool KillSrc) const { in copyPhysReg() argument
50 assert(ARM::GPRRegClass.contains(DestReg, SrcReg) && in copyPhysReg()
53 if (st.hasV6Ops() || ARM::hGPRRegClass.contains(SrcReg) || in copyPhysReg()
56 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
71 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
96 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
107 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
116 Register SrcReg, bool isKill, int FI, in storeRegToStackSlot() argument
121 (SrcReg.isPhysical() && isARMLowRegister(SrcReg))) && in storeRegToStackSlot()
125 (SrcReg.isPhysical() && isARMLowRegister(SrcReg))) { in storeRegToStackSlot()
135 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()