Lines Matching refs:VectorWidth
210 int VectorWidth = in IsSafeActiveMask() local
212 if (VectorWidth != 2 && VectorWidth != 4 && VectorWidth != 8 && in IsSafeActiveMask()
213 VectorWidth != 16) in IsSafeActiveMask()
250 if (VectorWidth != StepValue) { in IsSafeActiveMask()
252 << " doesn't match vector width " << VectorWidth << "\n"); in IsSafeActiveMask()
270 (ConstElemCount->getZExtValue() + VectorWidth - 1) / VectorWidth; in IsSafeActiveMask()
294 auto *VW = SE->getSCEV(ConstantInt::get(TripCount->getType(), VectorWidth)); in IsSafeActiveMask()
298 SE->getSCEV(ConstantInt::get(TripCount->getType(), VectorWidth - 1))); in IsSafeActiveMask()
311 dbgs() << "ARM TP: - VecWidth = " << VectorWidth << "\n"; in IsSafeActiveMask()
351 if (BaseC->getAPInt().urem(VectorWidth) == 0) in IsSafeActiveMask()
356 Log2_64(VectorWidth)); in IsSafeActiveMask()
362 if (BaseC->getAPInt().urem(VectorWidth) == 0) in IsSafeActiveMask()
365 if (BaseC->getAPInt().urem(VectorWidth) == 0) in IsSafeActiveMask()
380 unsigned VectorWidth = in InsertVCTPIntrinsic() local
391 ConstantInt *Factor = ConstantInt::get(cast<IntegerType>(Ty), VectorWidth); in InsertVCTPIntrinsic()
394 switch (VectorWidth) { in InsertVCTPIntrinsic()