Lines Matching refs:getReg
97 printRegName(O, Reg.getReg()); in printInst()
105 printRegName(O, Reg.getReg()); in printInst()
113 printRegName(O, Reg.getReg()); in printInst()
121 printRegName(O, Reg.getReg()); in printInst()
139 printRegName(O, Dst.getReg()); in printInst()
141 printRegName(O, MO1.getReg()); in printInst()
144 printRegName(O, MO2.getReg()); in printInst()
161 printRegName(O, Dst.getReg()); in printInst()
163 printRegName(O, MO1.getReg()); in printInst()
180 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
194 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
199 printRegName(O, MI->getOperand(1).getReg()); in printInst()
209 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
223 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
228 printRegName(O, MI->getOperand(0).getReg()); in printInst()
238 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
251 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
263 unsigned BaseReg = MI->getOperand(0).getReg(); in printInst()
265 if (MI->getOperand(i).getReg() == BaseReg) in printInst()
294 unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg(); in printInst()
345 unsigned Reg = Op.getReg(); in printOperand()
433 printRegName(O, MO1.getReg()); in printSORegRegOperand()
442 printRegName(O, MO2.getReg()); in printSORegRegOperand()
452 printRegName(O, MO1.getReg()); in printSORegImmOperand()
472 printRegName(O, MO1.getReg()); in printAM2PreOrOffsetIndexOp()
474 if (!MO2.getReg()) { in printAM2PreOrOffsetIndexOp()
487 printRegName(O, MO2.getReg()); in printAM2PreOrOffsetIndexOp()
502 printRegName(O, MO1.getReg()); in printAddrModeTBB()
504 printRegName(O, MO2.getReg()); in printAddrModeTBB()
515 printRegName(O, MO1.getReg()); in printAddrModeTBH()
517 printRegName(O, MO2.getReg()); in printAddrModeTBH()
549 if (!MO1.getReg()) { in printAddrMode2OffsetOperand()
558 printRegName(O, MO1.getReg()); in printAddrMode2OffsetOperand()
577 printRegName(O, MO1.getReg()); in printAM3PreOrOffsetIndexOp()
579 if (MO2.getReg()) { in printAM3PreOrOffsetIndexOp()
581 printRegName(O, MO2.getReg()); in printAM3PreOrOffsetIndexOp()
620 if (MO1.getReg()) { in printAddrMode3OffsetOperand()
622 printRegName(O, MO1.getReg()); in printAddrMode3OffsetOperand()
648 printRegName(O, MO1.getReg()); in printPostIdxRegOperand()
669 printRegName(O, MO1.getReg()); in printMveAddrModeRQOperand()
671 printRegName(O, MO2.getReg()); in printMveAddrModeRQOperand()
701 printRegName(O, MO1.getReg()); in printAddrMode5Operand()
727 printRegName(O, MO1.getReg()); in printAddrMode5FP16Operand()
748 printRegName(O, MO1.getReg()); in printAddrMode6Operand()
761 printRegName(O, MO1.getReg()); in printAddrMode7Operand()
770 if (MO.getReg() == 0) in printAddrMode6OffsetOperand()
774 printRegName(O, MO.getReg()); in printAddrMode6OffsetOperand()
857 return MRI.getEncodingValue(LHS.getReg()) < in printRegisterList()
858 MRI.getEncodingValue(RHS.getReg()); in printRegisterList()
866 printRegName(O, MI->getOperand(i).getReg()); in printRegisterList()
874 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRPairOperand()
1043 if (MI->getOperand(OpNum).getReg()) { in printSBitModifierOperand()
1044 assert(MI->getOperand(OpNum).getReg() == ARM::CPSR && in printSBitModifierOperand()
1143 printRegName(O, MO1.getReg()); in printThumbAddrModeRROperand()
1144 if (unsigned RegNum = MO2.getReg()) { in printThumbAddrModeRROperand()
1166 printRegName(O, MO1.getReg()); in printThumbAddrModeImm5SOperand()
1211 unsigned Reg = MO1.getReg(); in printT2SOOperand()
1234 printRegName(O, MO1.getReg()); in printAddrModeImm12Operand()
1261 printRegName(O, MO1.getReg()); in printT2AddrModeImm8Operand()
1293 printRegName(O, MO1.getReg()); in printT2AddrModeImm8s4Operand()
1321 printRegName(O, MO1.getReg()); in printT2AddrModeImm0_1020s4Operand()
1372 printRegName(O, MO1.getReg()); in printT2AddrModeSoRegOperand()
1374 assert(MO2.getReg() && "Invalid so_reg load / store address!"); in printT2AddrModeSoRegOperand()
1376 printRegName(O, MO2.getReg()); in printT2AddrModeSoRegOperand()
1440 PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC); in printModImmOperand()
1486 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOne()
1493 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwo()
1506 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpaced()
1523 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThree()
1525 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThree()
1527 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThree()
1538 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFour()
1540 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFour()
1542 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFour()
1544 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFour()
1553 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOneAllLanes()
1561 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoAllLanes()
1579 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeAllLanes()
1581 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThreeAllLanes()
1583 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeAllLanes()
1595 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourAllLanes()
1597 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFourAllLanes()
1599 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourAllLanes()
1601 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFourAllLanes()
1608 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpacedAllLanes()
1625 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpacedAllLanes()
1627 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpacedAllLanes()
1629 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpacedAllLanes()
1640 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpacedAllLanes()
1642 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpacedAllLanes()
1644 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpacedAllLanes()
1646 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpacedAllLanes()
1658 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpaced()
1660 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpaced()
1662 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpaced()
1673 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpaced()
1675 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpaced()
1677 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpaced()
1679 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpaced()
1687 unsigned Reg = MI->getOperand(OpNum).getReg(); in printMVEVectorList()