Lines Matching full:mi
88 void ARMInstPrinter::printInst(const MCInst *MI, uint64_t Address, in printInst() argument
91 unsigned Opcode = MI->getOpcode(); in printInst()
95 const MCOperand &Reg = MI->getOperand(0); in printInst()
103 const MCOperand &Reg = MI->getOperand(0); in printInst()
111 const MCOperand &Reg = MI->getOperand(0); in printInst()
119 const MCOperand &Reg = MI->getOperand(0); in printInst()
129 const MCOperand &Dst = MI->getOperand(0); in printInst()
130 const MCOperand &MO1 = MI->getOperand(1); in printInst()
131 const MCOperand &MO2 = MI->getOperand(2); in printInst()
132 const MCOperand &MO3 = MI->getOperand(3); in printInst()
135 printSBitModifierOperand(MI, 6, STI, O); in printInst()
136 printPredicateOperand(MI, 4, STI, O); in printInst()
152 const MCOperand &Dst = MI->getOperand(0); in printInst()
153 const MCOperand &MO1 = MI->getOperand(1); in printInst()
154 const MCOperand &MO2 = MI->getOperand(2); in printInst()
157 printSBitModifierOperand(MI, 5, STI, O); in printInst()
158 printPredicateOperand(MI, 3, STI, O); in printInst()
180 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
183 printPredicateOperand(MI, 2, STI, O); in printInst()
187 printRegisterList(MI, 4, STI, O); in printInst()
194 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
195 MI->getOperand(3).getImm() == -4) { in printInst()
197 printPredicateOperand(MI, 4, STI, O); in printInst()
199 printRegName(O, MI->getOperand(1).getReg()); in printInst()
209 if (MI->getOperand(0).getReg() == ARM::SP && MI->getNumOperands() > 5) { in printInst()
212 printPredicateOperand(MI, 2, STI, O); in printInst()
216 printRegisterList(MI, 4, STI, O); in printInst()
223 if (MI->getOperand(2).getReg() == ARM::SP && in printInst()
224 MI->getOperand(4).getImm() == 4) { in printInst()
226 printPredicateOperand(MI, 5, STI, O); in printInst()
228 printRegName(O, MI->getOperand(0).getReg()); in printInst()
238 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
240 printPredicateOperand(MI, 2, STI, O); in printInst()
242 printRegisterList(MI, 4, STI, O); in printInst()
251 if (MI->getOperand(0).getReg() == ARM::SP) { in printInst()
253 printPredicateOperand(MI, 2, STI, O); in printInst()
255 printRegisterList(MI, 4, STI, O); in printInst()
263 unsigned BaseReg = MI->getOperand(0).getReg(); in printInst()
264 for (unsigned i = 3; i < MI->getNumOperands(); ++i) { in printInst()
265 if (MI->getOperand(i).getReg() == BaseReg) in printInst()
271 printPredicateOperand(MI, 1, STI, O); in printInst()
277 printRegisterList(MI, 3, STI, O); in printInst()
294 unsigned Reg = MI->getOperand(isStore ? 1 : 0).getReg(); in printInst()
301 NewMI.addOperand(MI->getOperand(0)); in printInst()
307 for (unsigned i = isStore ? 3 : 2; i < MI->getNumOperands(); ++i) in printInst()
308 NewMI.addOperand(MI->getOperand(i)); in printInst()
319 switch (MI->getOperand(0).getImm()) { in printInst()
321 if (!printAliasInstr(MI, Address, STI, O)) in printInst()
322 printInstruction(MI, Address, STI, O); in printInst()
335 if (!printAliasInstr(MI, Address, STI, O)) in printInst()
336 printInstruction(MI, Address, STI, O); in printInst()
341 void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, in printOperand() argument
343 const MCOperand &Op = MI->getOperand(OpNo); in printOperand()
381 void ARMInstPrinter::printOperand(const MCInst *MI, uint64_t Address, in printOperand() argument
384 const MCOperand &Op = MI->getOperand(OpNum); in printOperand()
386 return printOperand(MI, OpNum, STI, O); in printOperand()
387 uint64_t Target = ARM_MC::evaluateBranchTarget(MII.get(MI->getOpcode()), in printOperand()
395 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum, in printThumbLdrLabelOperand() argument
398 const MCOperand &MO1 = MI->getOperand(OpNum); in printThumbLdrLabelOperand()
426 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum, in printSORegRegOperand() argument
429 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegRegOperand()
430 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegRegOperand()
431 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printSORegRegOperand()
446 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum, in printSORegImmOperand() argument
449 const MCOperand &MO1 = MI->getOperand(OpNum); in printSORegImmOperand()
450 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printSORegImmOperand()
463 void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op, in printAM2PreOrOffsetIndexOp() argument
466 const MCOperand &MO1 = MI->getOperand(Op); in printAM2PreOrOffsetIndexOp()
467 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM2PreOrOffsetIndexOp()
468 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAM2PreOrOffsetIndexOp()
494 void ARMInstPrinter::printAddrModeTBB(const MCInst *MI, unsigned Op, in printAddrModeTBB() argument
497 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBB()
498 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBB()
508 void ARMInstPrinter::printAddrModeTBH(const MCInst *MI, unsigned Op, in printAddrModeTBH() argument
511 const MCOperand &MO1 = MI->getOperand(Op); in printAddrModeTBH()
512 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAddrModeTBH()
523 void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op, in printAddrMode2Operand() argument
526 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode2Operand()
529 printOperand(MI, Op, STI, O); in printAddrMode2Operand()
534 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAddrMode2Operand()
539 printAM2PreOrOffsetIndexOp(MI, Op, STI, O); in printAddrMode2Operand()
542 void ARMInstPrinter::printAddrMode2OffsetOperand(const MCInst *MI, in printAddrMode2OffsetOperand() argument
546 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode2OffsetOperand()
547 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode2OffsetOperand()
568 void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op, in printAM3PreOrOffsetIndexOp() argument
571 const MCOperand &MO1 = MI->getOperand(Op); in printAM3PreOrOffsetIndexOp()
572 const MCOperand &MO2 = MI->getOperand(Op + 1); in printAM3PreOrOffsetIndexOp()
573 const MCOperand &MO3 = MI->getOperand(Op + 2); in printAM3PreOrOffsetIndexOp()
598 void ARMInstPrinter::printAddrMode3Operand(const MCInst *MI, unsigned Op, in printAddrMode3Operand() argument
601 const MCOperand &MO1 = MI->getOperand(Op); in printAddrMode3Operand()
603 printOperand(MI, Op, STI, O); in printAddrMode3Operand()
607 assert(ARM_AM::getAM3IdxMode(MI->getOperand(Op + 2).getImm()) != in printAddrMode3Operand()
610 printAM3PreOrOffsetIndexOp(MI, Op, O, AlwaysPrintImm0); in printAddrMode3Operand()
613 void ARMInstPrinter::printAddrMode3OffsetOperand(const MCInst *MI, in printAddrMode3OffsetOperand() argument
617 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode3OffsetOperand()
618 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode3OffsetOperand()
632 void ARMInstPrinter::printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum, in printPostIdxImm8Operand() argument
635 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8Operand()
641 void ARMInstPrinter::printPostIdxRegOperand(const MCInst *MI, unsigned OpNum, in printPostIdxRegOperand() argument
644 const MCOperand &MO1 = MI->getOperand(OpNum); in printPostIdxRegOperand()
645 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printPostIdxRegOperand()
651 void ARMInstPrinter::printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum, in printPostIdxImm8s4Operand() argument
654 const MCOperand &MO = MI->getOperand(OpNum); in printPostIdxImm8s4Operand()
661 void ARMInstPrinter::printMveAddrModeRQOperand(const MCInst *MI, unsigned OpNum, in printMveAddrModeRQOperand() argument
664 const MCOperand &MO1 = MI->getOperand(OpNum); in printMveAddrModeRQOperand()
665 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printMveAddrModeRQOperand()
679 void ARMInstPrinter::printLdStmModeOperand(const MCInst *MI, unsigned OpNum, in printLdStmModeOperand() argument
683 ARM_AM::getAM4SubMode(MI->getOperand(OpNum).getImm()); in printLdStmModeOperand()
688 void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum, in printAddrMode5Operand() argument
691 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5Operand()
692 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode5Operand()
695 printOperand(MI, OpNum, STI, O); in printAddrMode5Operand()
714 void ARMInstPrinter::printAddrMode5FP16Operand(const MCInst *MI, unsigned OpNum, in printAddrMode5FP16Operand() argument
717 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode5FP16Operand()
718 const MCOperand &MO2 = MI->getOperand(OpNum+1); in printAddrMode5FP16Operand()
721 printOperand(MI, OpNum, STI, O); in printAddrMode5FP16Operand()
740 void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum, in printAddrMode6Operand() argument
743 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode6Operand()
744 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrMode6Operand()
755 void ARMInstPrinter::printAddrMode7Operand(const MCInst *MI, unsigned OpNum, in printAddrMode7Operand() argument
758 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrMode7Operand()
765 void ARMInstPrinter::printAddrMode6OffsetOperand(const MCInst *MI, in printAddrMode6OffsetOperand() argument
769 const MCOperand &MO = MI->getOperand(OpNum); in printAddrMode6OffsetOperand()
778 void ARMInstPrinter::printBitfieldInvMaskImmOperand(const MCInst *MI, in printBitfieldInvMaskImmOperand() argument
782 const MCOperand &MO = MI->getOperand(OpNum); in printBitfieldInvMaskImmOperand()
792 void ARMInstPrinter::printMemBOption(const MCInst *MI, unsigned OpNum, in printMemBOption() argument
795 unsigned val = MI->getOperand(OpNum).getImm(); in printMemBOption()
799 void ARMInstPrinter::printInstSyncBOption(const MCInst *MI, unsigned OpNum, in printInstSyncBOption() argument
802 unsigned val = MI->getOperand(OpNum).getImm(); in printInstSyncBOption()
806 void ARMInstPrinter::printTraceSyncBOption(const MCInst *MI, unsigned OpNum, in printTraceSyncBOption() argument
809 unsigned val = MI->getOperand(OpNum).getImm(); in printTraceSyncBOption()
813 void ARMInstPrinter::printShiftImmOperand(const MCInst *MI, unsigned OpNum, in printShiftImmOperand() argument
816 unsigned ShiftOp = MI->getOperand(OpNum).getImm(); in printShiftImmOperand()
828 void ARMInstPrinter::printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum, in printPKHLSLShiftImm() argument
831 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHLSLShiftImm()
839 void ARMInstPrinter::printPKHASRShiftImm(const MCInst *MI, unsigned OpNum, in printPKHASRShiftImm() argument
842 unsigned Imm = MI->getOperand(OpNum).getImm(); in printPKHASRShiftImm()
851 void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum, in printRegisterList() argument
854 if (MI->getOpcode() != ARM::t2CLRM) { in printRegisterList()
855 assert(is_sorted(drop_begin(*MI, OpNum), in printRegisterList()
863 for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) { in printRegisterList()
866 printRegName(O, MI->getOperand(i).getReg()); in printRegisterList()
871 void ARMInstPrinter::printGPRPairOperand(const MCInst *MI, unsigned OpNum, in printGPRPairOperand() argument
874 unsigned Reg = MI->getOperand(OpNum).getReg(); in printGPRPairOperand()
880 void ARMInstPrinter::printSetendOperand(const MCInst *MI, unsigned OpNum, in printSetendOperand() argument
883 const MCOperand &Op = MI->getOperand(OpNum); in printSetendOperand()
890 void ARMInstPrinter::printCPSIMod(const MCInst *MI, unsigned OpNum, in printCPSIMod() argument
892 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIMod()
896 void ARMInstPrinter::printCPSIFlag(const MCInst *MI, unsigned OpNum, in printCPSIFlag() argument
898 const MCOperand &Op = MI->getOperand(OpNum); in printCPSIFlag()
908 void ARMInstPrinter::printMSRMaskOperand(const MCInst *MI, unsigned OpNum, in printMSRMaskOperand() argument
911 const MCOperand &Op = MI->getOperand(OpNum); in printMSRMaskOperand()
916 unsigned Opcode = MI->getOpcode(); in printMSRMaskOperand()
990 void ARMInstPrinter::printBankedRegOperand(const MCInst *MI, unsigned OpNum, in printBankedRegOperand() argument
993 uint32_t Banked = MI->getOperand(OpNum).getImm(); in printBankedRegOperand()
1004 void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum, in printPredicateOperand() argument
1007 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printPredicateOperand()
1016 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printMandatoryRestrictedPredicateOperand() argument
1018 if ((ARMCC::CondCodes)MI->getOperand(OpNum).getImm() == ARMCC::HS) in printMandatoryRestrictedPredicateOperand()
1021 printMandatoryPredicateOperand(MI, OpNum, STI, O); in printMandatoryRestrictedPredicateOperand()
1024 void ARMInstPrinter::printMandatoryPredicateOperand(const MCInst *MI, in printMandatoryPredicateOperand() argument
1028 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printMandatoryPredicateOperand()
1032 void ARMInstPrinter::printMandatoryInvertedPredicateOperand(const MCInst *MI, in printMandatoryInvertedPredicateOperand() argument
1036 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm(); in printMandatoryInvertedPredicateOperand()
1040 void ARMInstPrinter::printSBitModifierOperand(const MCInst *MI, unsigned OpNum, in printSBitModifierOperand() argument
1043 if (MI->getOperand(OpNum).getReg()) { in printSBitModifierOperand()
1044 assert(MI->getOperand(OpNum).getReg() == ARM::CPSR && in printSBitModifierOperand()
1050 void ARMInstPrinter::printNoHashImmediate(const MCInst *MI, unsigned OpNum, in printNoHashImmediate() argument
1053 O << MI->getOperand(OpNum).getImm(); in printNoHashImmediate()
1056 void ARMInstPrinter::printPImmediate(const MCInst *MI, unsigned OpNum, in printPImmediate() argument
1059 O << "p" << MI->getOperand(OpNum).getImm(); in printPImmediate()
1062 void ARMInstPrinter::printCImmediate(const MCInst *MI, unsigned OpNum, in printCImmediate() argument
1065 O << "c" << MI->getOperand(OpNum).getImm(); in printCImmediate()
1068 void ARMInstPrinter::printCoprocOptionImm(const MCInst *MI, unsigned OpNum, in printCoprocOptionImm() argument
1071 O << "{" << MI->getOperand(OpNum).getImm() << "}"; in printCoprocOptionImm()
1074 void ARMInstPrinter::printPCLabel(const MCInst *MI, unsigned OpNum, in printPCLabel() argument
1080 void ARMInstPrinter::printAdrLabelOperand(const MCInst *MI, unsigned OpNum, in printAdrLabelOperand() argument
1083 const MCOperand &MO = MI->getOperand(OpNum); in printAdrLabelOperand()
1101 void ARMInstPrinter::printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum, in printThumbS4ImmOperand() argument
1105 << "#" << formatImm(MI->getOperand(OpNum).getImm() * 4); in printThumbS4ImmOperand()
1108 void ARMInstPrinter::printThumbSRImm(const MCInst *MI, unsigned OpNum, in printThumbSRImm() argument
1111 unsigned Imm = MI->getOperand(OpNum).getImm(); in printThumbSRImm()
1115 void ARMInstPrinter::printThumbITMask(const MCInst *MI, unsigned OpNum, in printThumbITMask() argument
1119 unsigned Mask = MI->getOperand(OpNum).getImm(); in printThumbITMask()
1130 void ARMInstPrinter::printThumbAddrModeRROperand(const MCInst *MI, unsigned Op, in printThumbAddrModeRROperand() argument
1133 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeRROperand()
1134 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeRROperand()
1137 printOperand(MI, Op, STI, O); in printThumbAddrModeRROperand()
1151 void ARMInstPrinter::printThumbAddrModeImm5SOperand(const MCInst *MI, in printThumbAddrModeImm5SOperand() argument
1156 const MCOperand &MO1 = MI->getOperand(Op); in printThumbAddrModeImm5SOperand()
1157 const MCOperand &MO2 = MI->getOperand(Op + 1); in printThumbAddrModeImm5SOperand()
1160 printOperand(MI, Op, STI, O); in printThumbAddrModeImm5SOperand()
1174 void ARMInstPrinter::printThumbAddrModeImm5S1Operand(const MCInst *MI, in printThumbAddrModeImm5S1Operand() argument
1178 printThumbAddrModeImm5SOperand(MI, Op, STI, O, 1); in printThumbAddrModeImm5S1Operand()
1181 void ARMInstPrinter::printThumbAddrModeImm5S2Operand(const MCInst *MI, in printThumbAddrModeImm5S2Operand() argument
1185 printThumbAddrModeImm5SOperand(MI, Op, STI, O, 2); in printThumbAddrModeImm5S2Operand()
1188 void ARMInstPrinter::printThumbAddrModeImm5S4Operand(const MCInst *MI, in printThumbAddrModeImm5S4Operand() argument
1192 printThumbAddrModeImm5SOperand(MI, Op, STI, O, 4); in printThumbAddrModeImm5S4Operand()
1195 void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI, unsigned Op, in printThumbAddrModeSPOperand() argument
1198 printThumbAddrModeImm5SOperand(MI, Op, STI, O, 4); in printThumbAddrModeSPOperand()
1205 void ARMInstPrinter::printT2SOOperand(const MCInst *MI, unsigned OpNum, in printT2SOOperand() argument
1208 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2SOOperand()
1209 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2SOOperand()
1221 void ARMInstPrinter::printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum, in printAddrModeImm12Operand() argument
1224 const MCOperand &MO1 = MI->getOperand(OpNum); in printAddrModeImm12Operand()
1225 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printAddrModeImm12Operand()
1228 printOperand(MI, OpNum, STI, O); in printAddrModeImm12Operand()
1252 void ARMInstPrinter::printT2AddrModeImm8Operand(const MCInst *MI, in printT2AddrModeImm8Operand() argument
1256 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8Operand()
1257 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8Operand()
1279 void ARMInstPrinter::printT2AddrModeImm8s4Operand(const MCInst *MI, in printT2AddrModeImm8s4Operand() argument
1283 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4Operand()
1284 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm8s4Operand()
1287 printOperand(MI, OpNum, STI, O); in printT2AddrModeImm8s4Operand()
1314 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printT2AddrModeImm0_1020s4Operand() argument
1316 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm0_1020s4Operand()
1317 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeImm0_1020s4Operand()
1330 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printT2AddrModeImm8OffsetOperand() argument
1332 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8OffsetOperand()
1345 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printT2AddrModeImm8s4OffsetOperand() argument
1347 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeImm8s4OffsetOperand()
1362 void ARMInstPrinter::printT2AddrModeSoRegOperand(const MCInst *MI, in printT2AddrModeSoRegOperand() argument
1366 const MCOperand &MO1 = MI->getOperand(OpNum); in printT2AddrModeSoRegOperand()
1367 const MCOperand &MO2 = MI->getOperand(OpNum + 1); in printT2AddrModeSoRegOperand()
1368 const MCOperand &MO3 = MI->getOperand(OpNum + 2); in printT2AddrModeSoRegOperand()
1387 void ARMInstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum, in printFPImmOperand() argument
1390 const MCOperand &MO = MI->getOperand(OpNum); in printFPImmOperand()
1394 void ARMInstPrinter::printVMOVModImmOperand(const MCInst *MI, unsigned OpNum, in printVMOVModImmOperand() argument
1397 unsigned EncodedImm = MI->getOperand(OpNum).getImm(); in printVMOVModImmOperand()
1406 void ARMInstPrinter::printImmPlusOneOperand(const MCInst *MI, unsigned OpNum, in printImmPlusOneOperand() argument
1409 unsigned Imm = MI->getOperand(OpNum).getImm(); in printImmPlusOneOperand()
1413 void ARMInstPrinter::printRotImmOperand(const MCInst *MI, unsigned OpNum, in printRotImmOperand() argument
1416 unsigned Imm = MI->getOperand(OpNum).getImm(); in printRotImmOperand()
1424 void ARMInstPrinter::printModImmOperand(const MCInst *MI, unsigned OpNum, in printModImmOperand() argument
1427 MCOperand Op = MI->getOperand(OpNum); in printModImmOperand()
1431 return printOperand(MI, OpNum, STI, O); in printModImmOperand()
1437 switch (MI->getOpcode()) { in printModImmOperand()
1440 PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC); in printModImmOperand()
1466 void ARMInstPrinter::printFBits16(const MCInst *MI, unsigned OpNum, in printFBits16() argument
1468 markup(O, Markup::Immediate) << "#" << 16 - MI->getOperand(OpNum).getImm(); in printFBits16()
1471 void ARMInstPrinter::printFBits32(const MCInst *MI, unsigned OpNum, in printFBits32() argument
1473 markup(O, Markup::Immediate) << "#" << 32 - MI->getOperand(OpNum).getImm(); in printFBits32()
1476 void ARMInstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum, in printVectorIndex() argument
1479 O << "[" << MI->getOperand(OpNum).getImm() << "]"; in printVectorIndex()
1482 void ARMInstPrinter::printVectorListOne(const MCInst *MI, unsigned OpNum, in printVectorListOne() argument
1486 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOne()
1490 void ARMInstPrinter::printVectorListTwo(const MCInst *MI, unsigned OpNum, in printVectorListTwo() argument
1493 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwo()
1503 void ARMInstPrinter::printVectorListTwoSpaced(const MCInst *MI, unsigned OpNum, in printVectorListTwoSpaced() argument
1506 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpaced()
1516 void ARMInstPrinter::printVectorListThree(const MCInst *MI, unsigned OpNum, in printVectorListThree() argument
1523 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThree()
1525 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThree()
1527 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThree()
1531 void ARMInstPrinter::printVectorListFour(const MCInst *MI, unsigned OpNum, in printVectorListFour() argument
1538 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFour()
1540 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFour()
1542 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFour()
1544 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFour()
1548 void ARMInstPrinter::printVectorListOneAllLanes(const MCInst *MI, in printVectorListOneAllLanes() argument
1553 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListOneAllLanes()
1557 void ARMInstPrinter::printVectorListTwoAllLanes(const MCInst *MI, in printVectorListTwoAllLanes() argument
1561 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoAllLanes()
1571 void ARMInstPrinter::printVectorListThreeAllLanes(const MCInst *MI, in printVectorListThreeAllLanes() argument
1579 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeAllLanes()
1581 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListThreeAllLanes()
1583 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeAllLanes()
1587 void ARMInstPrinter::printVectorListFourAllLanes(const MCInst *MI, in printVectorListFourAllLanes() argument
1595 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourAllLanes()
1597 printRegName(O, MI->getOperand(OpNum).getReg() + 1); in printVectorListFourAllLanes()
1599 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourAllLanes()
1601 printRegName(O, MI->getOperand(OpNum).getReg() + 3); in printVectorListFourAllLanes()
1606 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printVectorListTwoSpacedAllLanes() argument
1608 unsigned Reg = MI->getOperand(OpNum).getReg(); in printVectorListTwoSpacedAllLanes()
1619 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printVectorListThreeSpacedAllLanes() argument
1625 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpacedAllLanes()
1627 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpacedAllLanes()
1629 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpacedAllLanes()
1634 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI, in printVectorListFourSpacedAllLanes() argument
1640 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpacedAllLanes()
1642 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpacedAllLanes()
1644 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpacedAllLanes()
1646 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpacedAllLanes()
1650 void ARMInstPrinter::printVectorListThreeSpaced(const MCInst *MI, in printVectorListThreeSpaced() argument
1658 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListThreeSpaced()
1660 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListThreeSpaced()
1662 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListThreeSpaced()
1666 void ARMInstPrinter::printVectorListFourSpaced(const MCInst *MI, unsigned OpNum, in printVectorListFourSpaced() argument
1673 printRegName(O, MI->getOperand(OpNum).getReg()); in printVectorListFourSpaced()
1675 printRegName(O, MI->getOperand(OpNum).getReg() + 2); in printVectorListFourSpaced()
1677 printRegName(O, MI->getOperand(OpNum).getReg() + 4); in printVectorListFourSpaced()
1679 printRegName(O, MI->getOperand(OpNum).getReg() + 6); in printVectorListFourSpaced()
1684 void ARMInstPrinter::printMVEVectorList(const MCInst *MI, unsigned OpNum, in printMVEVectorList() argument
1687 unsigned Reg = MI->getOperand(OpNum).getReg(); in printMVEVectorList()
1698 void ARMInstPrinter::printComplexRotationOp(const MCInst *MI, unsigned OpNo, in printComplexRotationOp() argument
1701 unsigned Val = MI->getOperand(OpNo).getImm(); in printComplexRotationOp()
1705 void ARMInstPrinter::printVPTPredicateOperand(const MCInst *MI, unsigned OpNum, in printVPTPredicateOperand() argument
1708 ARMVCC::VPTCodes CC = (ARMVCC::VPTCodes)MI->getOperand(OpNum).getImm(); in printVPTPredicateOperand()
1713 void ARMInstPrinter::printVPTMask(const MCInst *MI, unsigned OpNum, in printVPTMask() argument
1717 unsigned Mask = MI->getOperand(OpNum).getImm(); in printVPTMask()
1729 void ARMInstPrinter::printMveSaturateOp(const MCInst *MI, unsigned OpNum, in printMveSaturateOp() argument
1732 uint32_t Val = MI->getOperand(OpNum).getImm(); in printMveSaturateOp()