Lines Matching refs:ARM
70 const static MCFixupKindInfo InfosLE[ARM::NumTargetFixupKinds] = { in getFixupKindInfo()
132 const static MCFixupKindInfo InfosBE[ARM::NumTargetFixupKinds] = { in getFixupKindInfo()
225 bool HasThumb2 = STI.hasFeature(ARM::FeatureThumb2); in getRelaxedOpcode()
226 bool HasV8MBaselineOps = STI.hasFeature(ARM::HasV8MBaselineOps); in getRelaxedOpcode()
231 case ARM::tBcc: in getRelaxedOpcode()
232 return HasThumb2 ? (unsigned)ARM::t2Bcc : Op; in getRelaxedOpcode()
233 case ARM::tLDRpci: in getRelaxedOpcode()
234 return HasThumb2 ? (unsigned)ARM::t2LDRpci : Op; in getRelaxedOpcode()
235 case ARM::tADR: in getRelaxedOpcode()
236 return HasThumb2 ? (unsigned)ARM::t2ADR : Op; in getRelaxedOpcode()
237 case ARM::tB: in getRelaxedOpcode()
238 return HasV8MBaselineOps ? (unsigned)ARM::t2B : Op; in getRelaxedOpcode()
239 case ARM::tCBZ: in getRelaxedOpcode()
240 return ARM::tHINT; in getRelaxedOpcode()
241 case ARM::tCBNZ: in getRelaxedOpcode()
242 return ARM::tHINT; in getRelaxedOpcode()
263 case ARM::fixup_arm_thumb_br: { in reasonForFixupRelaxation()
275 case ARM::fixup_arm_thumb_bcc: { in reasonForFixupRelaxation()
287 case ARM::fixup_thumb_adr_pcrel_10: in reasonForFixupRelaxation()
288 case ARM::fixup_arm_thumb_cp: { in reasonForFixupRelaxation()
298 case ARM::fixup_arm_thumb_cb: { in reasonForFixupRelaxation()
307 case ARM::fixup_bf_branch: in reasonForFixupRelaxation()
309 case ARM::fixup_bf_target: in reasonForFixupRelaxation()
311 case ARM::fixup_bfl_target: in reasonForFixupRelaxation()
313 case ARM::fixup_bfc_target: in reasonForFixupRelaxation()
315 case ARM::fixup_wls: in reasonForFixupRelaxation()
317 case ARM::fixup_le: in reasonForFixupRelaxation()
327 case ARM::fixup_bfcsel_else_target: { in reasonForFixupRelaxation()
359 if ((Inst.getOpcode() == ARM::tCBZ || Inst.getOpcode() == ARM::tCBNZ) && in relaxInstruction()
360 RelaxedOp == ARM::tHINT) { in relaxInstruction()
457 (Kind == FK_Data_4 || Kind == ARM::fixup_arm_movw_lo16 || in adjustFixupValue()
458 Kind == ARM::fixup_arm_movt_hi16 || Kind == ARM::fixup_t2_movw_lo16 || in adjustFixupValue()
459 Kind == ARM::fixup_t2_movt_hi16)) in adjustFixupValue()
474 case ARM::fixup_arm_movt_hi16: in adjustFixupValue()
479 case ARM::fixup_arm_movw_lo16: { in adjustFixupValue()
487 case ARM::fixup_t2_movt_hi16: in adjustFixupValue()
492 case ARM::fixup_t2_movw_lo16: { in adjustFixupValue()
504 case ARM::fixup_arm_thumb_upper_8_15: in adjustFixupValue()
508 case ARM::fixup_arm_thumb_upper_0_7: in adjustFixupValue()
512 case ARM::fixup_arm_thumb_lower_8_15: in adjustFixupValue()
516 case ARM::fixup_arm_thumb_lower_0_7: in adjustFixupValue()
518 case ARM::fixup_arm_ldst_pcrel_12: in adjustFixupValue()
522 case ARM::fixup_t2_ldst_pcrel_12: in adjustFixupValue()
526 case ARM::fixup_arm_ldst_abs_12: { in adjustFixupValue()
540 if (Kind == ARM::fixup_t2_ldst_pcrel_12) in adjustFixupValue()
545 case ARM::fixup_arm_adr_pcrel_12: { in adjustFixupValue()
561 case ARM::fixup_t2_adr_pcrel_12: { in adjustFixupValue()
577 case ARM::fixup_arm_condbranch: in adjustFixupValue()
578 case ARM::fixup_arm_uncondbranch: in adjustFixupValue()
579 case ARM::fixup_arm_uncondbl: in adjustFixupValue()
580 case ARM::fixup_arm_condbl: in adjustFixupValue()
581 case ARM::fixup_arm_blx: in adjustFixupValue()
589 case ARM::fixup_t2_uncondbranch: { in adjustFixupValue()
613 case ARM::fixup_t2_condbranch: { in adjustFixupValue()
631 case ARM::fixup_arm_thumb_bl: { in adjustFixupValue()
633 (!STI->hasFeature(ARM::FeatureThumb2) && in adjustFixupValue()
634 !STI->hasFeature(ARM::HasV8MBaselineOps) && in adjustFixupValue()
635 !STI->hasFeature(ARM::HasV6MOps) && in adjustFixupValue()
668 case ARM::fixup_arm_thumb_blx: { in adjustFixupValue()
705 case ARM::fixup_thumb_adr_pcrel_10: in adjustFixupValue()
706 case ARM::fixup_arm_thumb_cp: in adjustFixupValue()
710 if (!STI->hasFeature(ARM::FeatureThumb2) && IsResolved) { in adjustFixupValue()
719 case ARM::fixup_arm_thumb_cb: { in adjustFixupValue()
732 case ARM::fixup_arm_thumb_br: in adjustFixupValue()
735 if (!STI->hasFeature(ARM::FeatureThumb2) && in adjustFixupValue()
736 !STI->hasFeature(ARM::HasV8MBaselineOps)) { in adjustFixupValue()
744 case ARM::fixup_arm_thumb_bcc: in adjustFixupValue()
747 if (!STI->hasFeature(ARM::FeatureThumb2)) { in adjustFixupValue()
755 case ARM::fixup_arm_pcrel_10_unscaled: { in adjustFixupValue()
771 case ARM::fixup_arm_pcrel_10: in adjustFixupValue()
775 case ARM::fixup_t2_pcrel_10: { in adjustFixupValue()
793 if (Kind == ARM::fixup_t2_pcrel_10) in adjustFixupValue()
798 case ARM::fixup_arm_pcrel_9: in adjustFixupValue()
802 case ARM::fixup_t2_pcrel_9: { in adjustFixupValue()
824 if (Kind == ARM::fixup_t2_pcrel_9) in adjustFixupValue()
829 case ARM::fixup_arm_mod_imm: in adjustFixupValue()
836 case ARM::fixup_t2_so_imm: { in adjustFixupValue()
853 case ARM::fixup_bf_branch: { in adjustFixupValue()
862 case ARM::fixup_bf_target: in adjustFixupValue()
863 case ARM::fixup_bfl_target: in adjustFixupValue()
864 case ARM::fixup_bfc_target: { in adjustFixupValue()
871 uint32_t HighBitMask = (Kind == ARM::fixup_bf_target ? 0xf800 : in adjustFixupValue()
872 Kind == ARM::fixup_bfl_target ? 0x3f800 : 0x800); in adjustFixupValue()
878 case ARM::fixup_bfcsel_else_target: { in adjustFixupValue()
892 case ARM::fixup_wls: in adjustFixupValue()
893 case ARM::fixup_le: { in adjustFixupValue()
901 if (Kind == ARM::fixup_le) in adjustFixupValue()
919 if (FixupKind == ARM::fixup_arm_thumb_bl) { in shouldForceRelocation()
935 if (Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_uncondbranch)) in shouldForceRelocation()
937 if (!Asm.isThumbFunc(Sym) && (FixupKind == ARM::fixup_arm_thumb_br || in shouldForceRelocation()
938 FixupKind == ARM::fixup_arm_thumb_bl || in shouldForceRelocation()
939 FixupKind == ARM::fixup_t2_condbranch || in shouldForceRelocation()
940 FixupKind == ARM::fixup_t2_uncondbranch)) in shouldForceRelocation()
947 if (A && (FixupKind == ARM::fixup_arm_thumb_blx || in shouldForceRelocation()
948 FixupKind == ARM::fixup_arm_blx || in shouldForceRelocation()
949 FixupKind == ARM::fixup_arm_uncondbl || in shouldForceRelocation()
950 FixupKind == ARM::fixup_arm_condbl)) in shouldForceRelocation()
962 case ARM::fixup_arm_thumb_bcc: in getFixupKindNumBytes()
963 case ARM::fixup_arm_thumb_cp: in getFixupKindNumBytes()
964 case ARM::fixup_thumb_adr_pcrel_10: in getFixupKindNumBytes()
965 case ARM::fixup_arm_thumb_upper_8_15: in getFixupKindNumBytes()
966 case ARM::fixup_arm_thumb_upper_0_7: in getFixupKindNumBytes()
967 case ARM::fixup_arm_thumb_lower_8_15: in getFixupKindNumBytes()
968 case ARM::fixup_arm_thumb_lower_0_7: in getFixupKindNumBytes()
972 case ARM::fixup_arm_thumb_br: in getFixupKindNumBytes()
973 case ARM::fixup_arm_thumb_cb: in getFixupKindNumBytes()
974 case ARM::fixup_arm_mod_imm: in getFixupKindNumBytes()
977 case ARM::fixup_arm_pcrel_10_unscaled: in getFixupKindNumBytes()
978 case ARM::fixup_arm_ldst_pcrel_12: in getFixupKindNumBytes()
979 case ARM::fixup_arm_pcrel_10: in getFixupKindNumBytes()
980 case ARM::fixup_arm_pcrel_9: in getFixupKindNumBytes()
981 case ARM::fixup_arm_ldst_abs_12: in getFixupKindNumBytes()
982 case ARM::fixup_arm_adr_pcrel_12: in getFixupKindNumBytes()
983 case ARM::fixup_arm_uncondbl: in getFixupKindNumBytes()
984 case ARM::fixup_arm_condbl: in getFixupKindNumBytes()
985 case ARM::fixup_arm_blx: in getFixupKindNumBytes()
986 case ARM::fixup_arm_condbranch: in getFixupKindNumBytes()
987 case ARM::fixup_arm_uncondbranch: in getFixupKindNumBytes()
991 case ARM::fixup_t2_ldst_pcrel_12: in getFixupKindNumBytes()
992 case ARM::fixup_t2_condbranch: in getFixupKindNumBytes()
993 case ARM::fixup_t2_uncondbranch: in getFixupKindNumBytes()
994 case ARM::fixup_t2_pcrel_10: in getFixupKindNumBytes()
995 case ARM::fixup_t2_pcrel_9: in getFixupKindNumBytes()
996 case ARM::fixup_t2_adr_pcrel_12: in getFixupKindNumBytes()
997 case ARM::fixup_arm_thumb_bl: in getFixupKindNumBytes()
998 case ARM::fixup_arm_thumb_blx: in getFixupKindNumBytes()
999 case ARM::fixup_arm_movt_hi16: in getFixupKindNumBytes()
1000 case ARM::fixup_arm_movw_lo16: in getFixupKindNumBytes()
1001 case ARM::fixup_t2_movt_hi16: in getFixupKindNumBytes()
1002 case ARM::fixup_t2_movw_lo16: in getFixupKindNumBytes()
1003 case ARM::fixup_t2_so_imm: in getFixupKindNumBytes()
1004 case ARM::fixup_bf_branch: in getFixupKindNumBytes()
1005 case ARM::fixup_bf_target: in getFixupKindNumBytes()
1006 case ARM::fixup_bfl_target: in getFixupKindNumBytes()
1007 case ARM::fixup_bfc_target: in getFixupKindNumBytes()
1008 case ARM::fixup_bfcsel_else_target: in getFixupKindNumBytes()
1009 case ARM::fixup_wls: in getFixupKindNumBytes()
1010 case ARM::fixup_le: in getFixupKindNumBytes()
1034 case ARM::fixup_arm_thumb_bcc: in getFixupKindContainerSizeBytes()
1035 case ARM::fixup_arm_thumb_cp: in getFixupKindContainerSizeBytes()
1036 case ARM::fixup_thumb_adr_pcrel_10: in getFixupKindContainerSizeBytes()
1037 case ARM::fixup_arm_thumb_br: in getFixupKindContainerSizeBytes()
1038 case ARM::fixup_arm_thumb_cb: in getFixupKindContainerSizeBytes()
1039 case ARM::fixup_arm_thumb_upper_8_15: in getFixupKindContainerSizeBytes()
1040 case ARM::fixup_arm_thumb_upper_0_7: in getFixupKindContainerSizeBytes()
1041 case ARM::fixup_arm_thumb_lower_8_15: in getFixupKindContainerSizeBytes()
1042 case ARM::fixup_arm_thumb_lower_0_7: in getFixupKindContainerSizeBytes()
1046 case ARM::fixup_arm_pcrel_10_unscaled: in getFixupKindContainerSizeBytes()
1047 case ARM::fixup_arm_ldst_pcrel_12: in getFixupKindContainerSizeBytes()
1048 case ARM::fixup_arm_pcrel_10: in getFixupKindContainerSizeBytes()
1049 case ARM::fixup_arm_pcrel_9: in getFixupKindContainerSizeBytes()
1050 case ARM::fixup_arm_adr_pcrel_12: in getFixupKindContainerSizeBytes()
1051 case ARM::fixup_arm_uncondbl: in getFixupKindContainerSizeBytes()
1052 case ARM::fixup_arm_condbl: in getFixupKindContainerSizeBytes()
1053 case ARM::fixup_arm_blx: in getFixupKindContainerSizeBytes()
1054 case ARM::fixup_arm_condbranch: in getFixupKindContainerSizeBytes()
1055 case ARM::fixup_arm_uncondbranch: in getFixupKindContainerSizeBytes()
1056 case ARM::fixup_t2_ldst_pcrel_12: in getFixupKindContainerSizeBytes()
1057 case ARM::fixup_t2_condbranch: in getFixupKindContainerSizeBytes()
1058 case ARM::fixup_t2_uncondbranch: in getFixupKindContainerSizeBytes()
1059 case ARM::fixup_t2_pcrel_10: in getFixupKindContainerSizeBytes()
1060 case ARM::fixup_t2_pcrel_9: in getFixupKindContainerSizeBytes()
1061 case ARM::fixup_t2_adr_pcrel_12: in getFixupKindContainerSizeBytes()
1062 case ARM::fixup_arm_thumb_bl: in getFixupKindContainerSizeBytes()
1063 case ARM::fixup_arm_thumb_blx: in getFixupKindContainerSizeBytes()
1064 case ARM::fixup_arm_movt_hi16: in getFixupKindContainerSizeBytes()
1065 case ARM::fixup_arm_movw_lo16: in getFixupKindContainerSizeBytes()
1066 case ARM::fixup_t2_movt_hi16: in getFixupKindContainerSizeBytes()
1067 case ARM::fixup_t2_movw_lo16: in getFixupKindContainerSizeBytes()
1068 case ARM::fixup_arm_mod_imm: in getFixupKindContainerSizeBytes()
1069 case ARM::fixup_t2_so_imm: in getFixupKindContainerSizeBytes()
1070 case ARM::fixup_bf_branch: in getFixupKindContainerSizeBytes()
1071 case ARM::fixup_bf_target: in getFixupKindContainerSizeBytes()
1072 case ARM::fixup_bfl_target: in getFixupKindContainerSizeBytes()
1073 case ARM::fixup_bfc_target: in getFixupKindContainerSizeBytes()
1074 case ARM::fixup_bfcsel_else_target: in getFixupKindContainerSizeBytes()
1075 case ARM::fixup_wls: in getFixupKindContainerSizeBytes()
1076 case ARM::fixup_le: in getFixupKindContainerSizeBytes()
1164 unsigned CFARegister = ARM::SP; in generateCompactUnwindEncoding()
1185 if (ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Reg)) in generateCompactUnwindEncoding()
1187 else if (ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Reg)) { in generateCompactUnwindEncoding()
1213 if ((CFARegister == ARM::SP) && (CFARegisterOffset == 0)) in generateCompactUnwindEncoding()
1217 if (CFARegister != ARM::R7) { in generateCompactUnwindEncoding()
1224 if (RegOffsets.lookup(ARM::LR) != (-4 - StackAdjust)) { in generateCompactUnwindEncoding()
1233 if (RegOffsets.lookup(ARM::R7) != (-8 - StackAdjust)) { in generateCompactUnwindEncoding()
1264 } GPRCSRegs[] = {{ARM::R6, CU::UNWIND_ARM_FRAME_FIRST_PUSH_R6}, in generateCompactUnwindEncoding()
1265 {ARM::R5, CU::UNWIND_ARM_FRAME_FIRST_PUSH_R5}, in generateCompactUnwindEncoding()
1266 {ARM::R4, CU::UNWIND_ARM_FRAME_FIRST_PUSH_R4}, in generateCompactUnwindEncoding()
1267 {ARM::R12, CU::UNWIND_ARM_FRAME_SECOND_PUSH_R12}, in generateCompactUnwindEncoding()
1268 {ARM::R11, CU::UNWIND_ARM_FRAME_SECOND_PUSH_R11}, in generateCompactUnwindEncoding()
1269 {ARM::R10, CU::UNWIND_ARM_FRAME_SECOND_PUSH_R10}, in generateCompactUnwindEncoding()
1270 {ARM::R9, CU::UNWIND_ARM_FRAME_SECOND_PUSH_R9}, in generateCompactUnwindEncoding()
1271 {ARM::R8, CU::UNWIND_ARM_FRAME_SECOND_PUSH_R8}}; in generateCompactUnwindEncoding()
1311 static unsigned FPRCSRegs[] = { ARM::D8, ARM::D10, ARM::D12, ARM::D14 }; in generateCompactUnwindEncoding()