1789   unsigned Vd = fieldFromInstruction(Val, 8, 5);  in DecodeSPRRegListOperand()  local
1793   if (regs == 0 || (Vd + regs) > 32) {  in DecodeSPRRegListOperand()
1794     regs = Vd + regs > 32 ? 32 - Vd : regs;  in DecodeSPRRegListOperand()
1799   if (!Check(S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder)))  in DecodeSPRRegListOperand()
1802     if (!Check(S, DecodeSPRRegisterClass(Inst, ++Vd, Address, Decoder)))  in DecodeSPRRegListOperand()
1814   unsigned Vd = fieldFromInstruction(Val, 8, 5);  in DecodeDPRRegListOperand()  local
1818   if (regs == 0 || regs > 16 || (Vd + regs) > 32) {  in DecodeDPRRegListOperand()
1819     regs = Vd + regs > 32 ? 32 - Vd : regs;  in DecodeDPRRegListOperand()
1825   if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder)))  in DecodeDPRRegListOperand()
1828     if (!Check(S, DecodeDPRRegisterClass(Inst, ++Vd, Address, Decoder)))  in DecodeDPRRegListOperand()
6018   unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);  in DecodeVCVTD()  local
6019   Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);  in DecodeVCVTD()
6062   if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder)))  in DecodeVCVTD()
6077   unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);  in DecodeVCVTQ()  local
6078   Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);  in DecodeVCVTQ()
6121   if (!Check(S, DecodeQPRRegisterClass(Inst, Vd, Address, Decoder)))  in DecodeVCVTQ()
6134   unsigned Vd = (fieldFromInstruction(Insn, 12, 4) << 0);  in DecodeNEONComplexLane64Instruction()  local
6135   Vd |= (fieldFromInstruction(Insn, 22, 1) << 4);  in DecodeNEONComplexLane64Instruction()
6147   if (!Check(S, DestRegDecoder(Inst, Vd, Address, Decoder)))  in DecodeNEONComplexLane64Instruction()
6149   if (!Check(S, DestRegDecoder(Inst, Vd, Address, Decoder)))  in DecodeNEONComplexLane64Instruction()