Lines Matching refs:inITBlock

316   bool inITBlock() { return ITState.CurPosition != ~0U; }  in inITBlock()  function in __anon6be9c9a00111::ARMAsmParser
317 bool inExplicitITBlock() { return inITBlock() && ITState.IsExplicit; } in inExplicitITBlock()
318 bool inImplicitITBlock() { return inITBlock() && !ITState.IsExplicit; } in inImplicitITBlock()
325 if (!inITBlock()) return; in forwardITPosition()
372 return inITBlock() && (ITState.Mask & 1); in isITBlockFull()
395 assert(!inITBlock()); in startImplicitITBlock()
407 assert(!inITBlock()); in startExplicitITBlock()
5851 if(inITBlock()) { in cvtThumbBranches()
7642 if (inITBlock() && !instIsBreakpoint(Inst)) { in validateInstruction()
10374 Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) && in processInstruction()
10408 inITBlock() == (Inst.getOpcode() == ARM::t2MOVsr) && in processInstruction()
10443 inITBlock() == (Inst.getOpcode() == ARM::t2MOVsi) && in processInstruction()
10458 if (inITBlock()) { in processInstruction()
10686 Inst.getOperand(5).getReg() != (inITBlock() ? 0 : ARM::CPSR) || in processInstruction()
10758 if (Inst.getOperand(1).getImm() != ARMCC::AL && !inITBlock()) { in processInstruction()
10765 if (Inst.getOperand(1).getImm() != ARMCC::AL && !inITBlock()){ in processInstruction()
10772 if (Inst.getOperand(1).getImm() == ARMCC::AL || inITBlock()) { in processInstruction()
10856 Inst.getOperand(4).getReg() == (inITBlock() ? 0 : ARM::CPSR) && in processInstruction()
10982 assert(!inITBlock() && "nested IT blocks?!"); in processInstruction()
10997 Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) && in processInstruction()
11033 Inst.getOperand(5).getReg() == (inITBlock() ? 0 : ARM::CPSR) && in processInstruction()
11137 if (isThumbTwo() && !IsCPSR && !inITBlock()) in checkTargetMatchPredicate()
11139 if (isThumbTwo() && IsCPSR && inITBlock()) in checkTargetMatchPredicate()
11142 if (Opc == ARM::tLSLri && Inst.getOperand(3).getImm() == 0 && inITBlock()) in checkTargetMatchPredicate()