287   } ITState;  member in __anon6be9c9a00111::ARMAsmParser
300     ITInst.addOperand(MCOperand::createImm(ITState.Cond));  in flushPendingInstructions()
301     ITInst.addOperand(MCOperand::createImm(ITState.Mask));  in flushPendingInstructions()
312     ITState.Mask = 0;  in flushPendingInstructions()
313     ITState.CurPosition = ~0U;  in flushPendingInstructions()
316   bool inITBlock() { return ITState.CurPosition != ~0U; }  in inITBlock()
317   bool inExplicitITBlock() { return inITBlock() && ITState.IsExplicit; }  in inExplicitITBlock()
318   bool inImplicitITBlock() { return inITBlock() && !ITState.IsExplicit; }  in inImplicitITBlock()
321     return ITState.CurPosition == 4 - (unsigned)llvm::countr_zero(ITState.Mask);  in lastInITBlock()
329     unsigned TZ = llvm::countr_zero(ITState.Mask);  in forwardITPosition()
330     if (++ITState.CurPosition == 5 - TZ && ITState.IsExplicit)  in forwardITPosition()
331       ITState.CurPosition = ~0U; // Done with the IT block after this.  in forwardITPosition()
337     assert(ITState.CurPosition > 1);  in rewindImplicitITPosition()
338     ITState.CurPosition--;  in rewindImplicitITPosition()
339     unsigned TZ = llvm::countr_zero(ITState.Mask);  in rewindImplicitITPosition()
341     NewMask |= ITState.Mask & (0xC << TZ);  in rewindImplicitITPosition()
343     ITState.Mask = NewMask;  in rewindImplicitITPosition()
350     assert(ITState.CurPosition == 1);  in discardImplicitITBlock()
351     ITState.CurPosition = ~0U;  in discardImplicitITBlock()
356     unsigned MaskBit = extractITMaskBit(ITState.Mask, ITState.CurPosition);  in currentITCond()
357     return MaskBit ? ARMCC::getOppositeCondition(ITState.Cond) : ITState.Cond;  in currentITCond()
363     if (ITState.CurPosition == 1) {  in invertCurrentITCondition()
364       ITState.Cond = ARMCC::getOppositeCondition(ITState.Cond);  in invertCurrentITCondition()
366       ITState.Mask ^= 1 << (5 - ITState.CurPosition);  in invertCurrentITCondition()
372     return inITBlock() && (ITState.Mask & 1);  in isITBlockFull()
380     assert(Cond == ITState.Cond ||  in extendImplicitITBlock()
381            Cond == ARMCC::getOppositeCondition(ITState.Cond));  in extendImplicitITBlock()
382     unsigned TZ = llvm::countr_zero(ITState.Mask);  in extendImplicitITBlock()
385     NewMask |= ITState.Mask & (0xE << TZ);  in extendImplicitITBlock()
387     NewMask |= (Cond != ITState.Cond) << TZ;  in extendImplicitITBlock()
390     ITState.Mask = NewMask;  in extendImplicitITBlock()
396     ITState.Cond = ARMCC::AL;  in startImplicitITBlock()
397     ITState.Mask = 8;  in startImplicitITBlock()
398     ITState.CurPosition = 1;  in startImplicitITBlock()
399     ITState.IsExplicit = false;  in startImplicitITBlock()
408     ITState.Cond = Cond;  in startExplicitITBlock()
409     ITState.Mask = Mask;  in startExplicitITBlock()
410     ITState.CurPosition = 0;  in startExplicitITBlock()
411     ITState.IsExplicit = true;  in startExplicitITBlock()
704     ITState.CurPosition = ~0U;  in ARMAsmParser()
11277     extendImplicitITBlock(ITState.Cond);  in MatchInstruction()
11335       ITState.Cond =  in MatchInstruction()