421     addPass(createLowerAtomicPass());  in addIRPasses()
423     addPass(createAtomicExpandLegacyPass());  in addIRPasses()
429     addPass(createCFGSimplificationPass(  in addIRPasses()
436   addPass(createMVEGatherScatterLoweringPass());  in addIRPasses()
437   addPass(createMVELaneInterleavingPass());  in addIRPasses()
443     addPass(createARMParallelDSPPass());  in addIRPasses()
447     addPass(createComplexDeinterleavingPass(TM));  in addIRPasses()
451     addPass(createInterleavedAccessPass());  in addIRPasses()
455     addPass(createCFGuardCheckPass());  in addIRPasses()
458     addPass(createJMCInstrumenterPass());  in addIRPasses()
463     addPass(createTypePromotionLegacyPass());  in addCodeGenPrepare()
484     addPass(createGlobalMergePass(TM, 127, OnlyOptimizeForSize,  in addPreISel()
489     addPass(createHardwareLoopsLegacyPass());  in addPreISel()
490     addPass(createMVETailPredicationPass());  in addPreISel()
498     addPass(createBarrierNoopPass());  in addPreISel()
505   addPass(createARMISelDag(getARMTargetMachine(), getOptLevel()));  in addInstSelector()
510   addPass(new IRTranslator(getOptLevel()));  in addIRTranslator()
515   addPass(new Legalizer());  in addLegalizeMachineIR()
520   addPass(new RegBankSelect());  in addRegBankSelect()
525   addPass(new InstructionSelect(getOptLevel()));  in addGlobalInstructionSelect()
532       addPass(&MachinePipelinerID);  in addPreRegAlloc()
534     addPass(createMVETPAndVPTOptimisationsPass());  in addPreRegAlloc()
536     addPass(createMLxExpansionPass());  in addPreRegAlloc()
539       addPass(createARMLoadStoreOptimizationPass(/* pre-register alloc */ true));  in addPreRegAlloc()
542       addPass(createA15SDOptimizerPass());  in addPreRegAlloc()
549       addPass(createARMLoadStoreOptimizationPass());  in addPreSched2()
551     addPass(new ARMExecutionDomainFix());  in addPreSched2()
552     addPass(createBreakFalseDeps());  in addPreSched2()
557   addPass(createARMExpandPseudoPass());  in addPreSched2()
563     addPass(createThumb2SizeReductionPass([this](const Function &F) {  in addPreSched2()
568     addPass(createIfConverter([](const MachineFunction &MF) {  in addPreSched2()
572   addPass(createThumb2ITBlockPass());  in addPreSched2()
577     addPass(&PostMachineSchedulerID);  in addPreSched2()
578     addPass(&PostRASchedulerID);  in addPreSched2()
581   addPass(createMVEVPTBlockPass());  in addPreSched2()
582   addPass(createARMIndirectThunks());  in addPreSched2()
583   addPass(createARMSLSHardeningPass());  in addPreSched2()
587   addPass(createThumb2SizeReductionPass());  in addPreEmitPass()
590   addPass(createUnpackMachineBundles([](const MachineFunction &MF) {  in addPreEmitPass()
596     addPass(createARMBlockPlacementPass());  in addPreEmitPass()
597     addPass(createARMOptimizeBarriersPass());  in addPreEmitPass()
605   addPass(createARMFixCortexA57AES1742098Pass());  in addPreEmitPass2()
608   addPass(createARMBranchTargetsPass());  in addPreEmitPass2()
612   addPass(createARMConstantIslandPass());  in addPreEmitPass2()
616   addPass(createARMLowOverheadLoopsPass());  in addPreEmitPass2()
620     addPass(createCFGuardLongjmpPass());  in addPreEmitPass2()
622     addPass(createEHContGuardCatchretPass());  in addPreEmitPass2()