Lines Matching refs:CodeGenOptLevel
224 CodeGenOptLevel OL, bool isLittle) in ARMBaseTargetMachine()
334 CodeGenOptLevel OL, bool JIT) in ARMLETargetMachine()
342 CodeGenOptLevel OL, bool JIT) in ARMBETargetMachine()
428 if (TM->getOptLevel() != CodeGenOptLevel::None && EnableAtomicTidy) in addIRPasses()
442 if (getOptLevel() == CodeGenOptLevel::Aggressive) in addIRPasses()
446 if (TM->getOptLevel() >= CodeGenOptLevel::Default) in addIRPasses()
450 if (TM->getOptLevel() != CodeGenOptLevel::None) in addIRPasses()
462 if (getOptLevel() != CodeGenOptLevel::None) in addCodeGenPrepare()
468 if ((TM->getOptLevel() != CodeGenOptLevel::None && in addPreISel()
477 (TM->getOptLevel() < CodeGenOptLevel::Aggressive) && in addPreISel()
488 if (TM->getOptLevel() != CodeGenOptLevel::None) { in addPreISel()
530 if (getOptLevel() != CodeGenOptLevel::None) { in addPreRegAlloc()
531 if (getOptLevel() == CodeGenOptLevel::Aggressive) in addPreRegAlloc()
547 if (getOptLevel() != CodeGenOptLevel::None) { in addPreSched2()
559 if (getOptLevel() != CodeGenOptLevel::None) { in addPreSched2()
576 if (getOptLevel() != CodeGenOptLevel::None) { in addPreSched2()
595 if (getOptLevel() != CodeGenOptLevel::None) { in addPreEmitPass()