Lines Matching refs:latency

434   // no delay slots, so the latency of a branch is unimportant
468 // Extra latency cycles since wbck is 2 cycles
477 // Extra latency cycles since wbck is 2 cycles
487 // Extra latency cycles since wbck is 4 cycles
496 // Extra latency cycles since wbck is 4 cycles
668 // Extra 1 latency cycle since wbck is 2 cycles
677 // Extra 1 latency cycle since wbck is 2 cycles
708 // FIXME: Result latency is 1 if address is 64-bit aligned.
880 // Extra latency cycles since wbck is 7 cycles
908 // Extra latency cycles since wbck is 7 cycles
1279 // Extra latency cycles since wbck is 6 cycles
1288 // Extra latency cycles since wbck is 6 cycles
1297 // Extra latency cycles since wbck is 6 cycles
1306 // Extra latency cycles since wbck is 6 cycles
1315 // Extra latency cycles since wbck is 6 cycles
1324 // Extra latency cycles since wbck is 6 cycles
1333 // Extra latency cycles since wbck is 6 cycles
1342 // Extra latency cycles since wbck is 6 cycles
1351 // Extra latency cycles since wbck is 6 cycles
1360 // Extra latency cycles since wbck is 6 cycles
1369 // Extra latency cycles since wbck is 6 cycles
1378 // Extra latency cycles since wbck is 6 cycles
1387 // Extra latency cycles since wbck is 6 cycles
1396 // Extra latency cycles since wbck is 6 cycles
1405 // Extra latency cycles since wbck is 6 cycles
1414 // Extra latency cycles since wbck is 6 cycles
1424 // Extra latency cycles since wbck is 6 cycles
1435 // Extra latency cycles since wbck is 7 cycles
1444 // Extra latency cycles since wbck is 6 cycles
1453 // Extra latency cycles since wbck is 6 cycles
1462 // Extra latency cycles since wbck is 6 cycles
1471 // Extra latency cycles since wbck is 6 cycles
1481 // Extra latency cycles since wbck is 6 cycles
1490 // Extra latency cycles since wbck is 7 cycles
1500 // Extra latency cycles since wbck is 7 cycles
1509 // Extra latency cycles since wbck is 9 cycles
1518 // Extra latency cycles since wbck is 6 cycles
1527 // Extra latency cycles since wbck is 7 cycles
1536 // Extra latency cycles since wbck is 7 cycles
1545 // Extra latency cycles since wbck is 9 cycles
1563 // Extra latency cycles since wbck is 6 cycles
1572 // Extra latency cycles since wbck is 6 cycles
1581 // Extra latency cycles since wbck is 6 cycles
1631 // Extra latency cycles since wbck is 6 cycles
1640 // Extra latency cycles since wbck is 6 cycles
1651 // Extra latency cycles since wbck is 7 cycles
1662 // Extra latency cycles since wbck is 6 cycles
1672 // Extra latency cycles since wbck is 6 cycles
1681 // Extra latency cycles since wbck is 6 cycles
1694 // Extra latency cycles since wbck is 7 cycles
1703 // Extra latency cycles since wbck is 7 cycles
1712 // Extra latency cycles since wbck is 7 cycles
1723 // Extra latency cycles since wbck is 9 cycles
1732 // Extra latency cycles since wbck is 7 cycles
1743 // Extra latency cycles since wbck is 9 cycles
1752 // Extra latency cycles since wbck is 10 cycles
1761 // Extra latency cycles since wbck is 11 cycles
1770 // Extra latency cycles since wbck is 6 cycles
1781 // Extra latency cycles since wbck is 7 cycles
1792 // Extra latency cycles since wbck is 8 cycles
1802 // Extra latency cycles since wbck is 6 cycles
1811 // Extra latency cycles since wbck is 7 cycles
1820 // Extra latency cycles since wbck is 7 cycles
1827 // Extra latency cycles since wbck is 7 cycles
1834 // Extra latency cycles since wbck is 8 cycles
1841 // Extra latency cycles since wbck is 8 cycles
1850 // Extra latency cycles since wbck is 7 cycles
1857 // Extra latency cycles since wbck is 7 cycles
1864 // Extra latency cycles since wbck is 8 cycles
1871 // Extra latency cycles since wbck is 8 cycles
1890 let LoadLatency = 2; // Optimistic load latency assuming bypass.
1908 // The AGU unit has BufferSize=1 so that the latency between operations
1924 // Define scheduler read/write types with their resources and latency on A9.
1975 // NEON has an odd mix of latencies. Simply name the write types by latency.
2036 // Define helpers for extra latency without consuming resources.
2046 // latency for instructions that generate multiple loads or stores.
2058 // LDM/VLDM/VLDn address generation latency & resources.
2079 // the same latency.
2082 // Each A9WriteL#N variant adds N cycles of latency without consuming
2148 // A9WriteLfpOps with additive latency that takes a single issue slot.
2153 // A9WriteLfp1-8Mov adds a cycle of latency and FP resource for
2178 // A9WriteLMfpLo takes a LS and FP resource and one issue slot but no latency.
2183 // Each A9WriteL#N variant adds N cycles of latency without consuming
2189 // the same latency.
2256 // additive latency.
2270 // after the instruction issues, decreases producer latency by N-1.
2337 // latency is only relevant for users of an updated address.
2358 // is listed after all def operands, so has no effective latency.