Lines Matching full:arm
9 /// This file implements the targeting of the RegisterBankInfo class for ARM.
30 namespace ARM { namespace
130 } // end namespace arm
137 // (ARM::RegBanks) is unique in the compiler. At some point, it in ARMRegisterBankInfo()
142 const RegisterBank &RBGPR = getRegBank(ARM::GPRRegBankID); in ARMRegisterBankInfo()
144 assert(&ARM::GPRRegBank == &RBGPR && "The order in RegBanks is messed up"); in ARMRegisterBankInfo()
147 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRRegClassID)) && in ARMRegisterBankInfo()
149 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRwithAPSRRegClassID)) && in ARMRegisterBankInfo()
151 assert(RBGPR.covers(*TRI.getRegClass(ARM::GPRnopcRegClassID)) && in ARMRegisterBankInfo()
153 assert(RBGPR.covers(*TRI.getRegClass(ARM::rGPRRegClassID)) && in ARMRegisterBankInfo()
155 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPRRegClassID)) && in ARMRegisterBankInfo()
157 assert(RBGPR.covers(*TRI.getRegClass(ARM::tcGPRRegClassID)) && in ARMRegisterBankInfo()
159 assert(RBGPR.covers(*TRI.getRegClass(ARM::tGPROdd_and_tcGPRRegClassID)) && in ARMRegisterBankInfo()
165 ARM::checkPartialMappings(); in ARMRegisterBankInfo()
166 ARM::checkValueMappings(); in ARMRegisterBankInfo()
176 using namespace ARM; in getRegBankFromRegClass()
196 return getRegBank(ARM::GPRRegBankID); in getRegBankFromRegClass()
203 return getRegBank(ARM::FPRRegBankID); in getRegBankFromRegClass()
228 const ValueMapping *OperandsMapping = &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
237 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
238 : &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
259 OperandsMapping = &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
273 ? &ARM::ValueMappings[ARM::GPR3OpsIdx] in getInstrMapping()
274 : getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
275 &ARM::ValueMappings[ARM::DPR3OpsIdx]}); in getInstrMapping()
283 ? getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
284 &ARM::ValueMappings[ARM::GPR3OpsIdx]}) in getInstrMapping()
285 : &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
295 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
296 : &ARM::ValueMappings[ARM::SPR3OpsIdx]; in getInstrMapping()
303 ? getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
304 &ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
305 &ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
306 &ARM::ValueMappings[ARM::DPR3OpsIdx]}) in getInstrMapping()
307 : getOperandsMapping({&ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
308 &ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
309 &ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
310 &ARM::ValueMappings[ARM::SPR3OpsIdx]}); in getInstrMapping()
318 getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
319 &ARM::ValueMappings[ARM::SPR3OpsIdx]}); in getInstrMapping()
327 getOperandsMapping({&ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
328 &ARM::ValueMappings[ARM::DPR3OpsIdx]}); in getInstrMapping()
339 ? getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
340 &ARM::ValueMappings[ARM::DPR3OpsIdx]}) in getInstrMapping()
341 : getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
342 &ARM::ValueMappings[ARM::SPR3OpsIdx]}); in getInstrMapping()
353 ? getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
354 &ARM::ValueMappings[ARM::GPR3OpsIdx]}) in getInstrMapping()
355 : getOperandsMapping({&ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
356 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
362 {Ty.getSizeInBits() == 64 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
363 : &ARM::ValueMappings[ARM::SPR3OpsIdx], in getInstrMapping()
371 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr}); in getInstrMapping()
381 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
382 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
383 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
384 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
392 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr, in getInstrMapping()
393 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
394 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
410 auto FPRValueMapping = Size == 32 ? &ARM::ValueMappings[ARM::SPR3OpsIdx] in getInstrMapping()
411 : &ARM::ValueMappings[ARM::DPR3OpsIdx]; in getInstrMapping()
413 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr, in getInstrMapping()
427 getOperandsMapping({&ARM::ValueMappings[ARM::DPR3OpsIdx], in getInstrMapping()
428 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
429 &ARM::ValueMappings[ARM::GPR3OpsIdx]}); in getInstrMapping()
442 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
443 &ARM::ValueMappings[ARM::GPR3OpsIdx], in getInstrMapping()
444 &ARM::ValueMappings[ARM::DPR3OpsIdx]}); in getInstrMapping()
452 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr}); in getInstrMapping()
461 OperandBanks[0] = Size == 64 ? &ARM::ValueMappings[ARM::DPR3OpsIdx] in getInstrMapping()
462 : &ARM::ValueMappings[ARM::GPR3OpsIdx]; in getInstrMapping()
471 getOperandsMapping({&ARM::ValueMappings[ARM::GPR3OpsIdx], nullptr}); in getInstrMapping()
484 (Mapping.RegBank->getID() != ARM::FPRRegBankID || in getInstrMapping()