Lines Matching refs:CondCodes
175 ARMCC::CondCodes Pred, unsigned PredReg);
179 ARMCC::CondCodes Pred, unsigned PredReg, const DebugLoc &DL,
185 ARMCC::CondCodes Pred, unsigned PredReg, const DebugLoc &DL,
489 ARMCC::CondCodes Pred, in UpdateBaseRegUses()
631 ARMCC::CondCodes Pred, unsigned PredReg, const DebugLoc &DL, in CreateLoadStoreMulti()
838 ARMCC::CondCodes Pred, unsigned PredReg, const DebugLoc &DL, in CreateLoadStoreDouble()
909 ARMCC::CondCodes Pred = getInstrPredicate(*First, PredReg); in MergeOpsUpdate()
1192 ARMCC::CondCodes Pred, Register PredReg) { in isIncrementOrDecrement()
1224 ARMCC::CondCodes Pred, Register PredReg, int &Offset) { in findIncDecBefore()
1244 ARMCC::CondCodes Pred, Register PredReg, int &Offset, in findIncDecAfter()
1298 ARMCC::CondCodes Pred = getInstrPredicate(*MI, PredReg); in MergeBaseUpdateLSMultiple()
1494 ARMCC::CondCodes Pred = getInstrPredicate(*MI, PredReg); in MergeBaseUpdateLoadStore()
1632 ARMCC::CondCodes Pred = getInstrPredicate(MI, PredReg); in MergeBaseUpdateLSDouble()
1737 bool BaseKill, bool BaseUndef, ARMCC::CondCodes Pred, in InsertLDR_STR()
1802 ARMCC::CondCodes Pred = getInstrPredicate(*MI, PredReg); in FixInvalidRegPairOp()
1882 ARMCC::CondCodes CurrPred = ARMCC::AL; in LoadStoreMultipleOpti()
1902 ARMCC::CondCodes Pred = getInstrPredicate(*MBBI, PredReg); in LoadStoreMultipleOpti()
2173 ARMCC::CondCodes &Pred, bool &isT2);
2258 Register &PredReg, ARMCC::CondCodes &Pred, bool &isT2) { in CanFormLdStDWord()
2418 ARMCC::CondCodes Pred = ARMCC::AL; in RescheduleOps()