3147   MachineInstr *BaseAccess = nullptr;  in DistributeIncrements()  local
3170       BaseAccess = &Use;  in DistributeIncrements()
3177   if (BaseAccess && Increment) {  in DistributeIncrements()
3178     if (PrePostInc || BaseAccess->getParent() != Increment->getParent())  in DistributeIncrements()
3192       if (&Use == BaseAccess || (Use.getOpcode() != TargetOpcode::PHI &&  in DistributeIncrements()
3193                                  !DT->dominates(BaseAccess, &Use))) {  in DistributeIncrements()
3202         BaseAccess->getOpcode(), IncrementOffset > 0 ? ARM_AM::add : ARM_AM::sub);  in DistributeIncrements()
3220     BaseAccess = PrePostInc;  in DistributeIncrements()
3237     if (DT->dominates(BaseAccess, Use)) {  in DistributeIncrements()
3247     } else if (!DT->dominates(Use, BaseAccess)) {  in DistributeIncrements()
3260     LLVM_DEBUG(dbgs() << "Changing: "; BaseAccess->dump());  in DistributeIncrements()
3264         createPostIncLoadStore(BaseAccess, IncrementOffset, NewBaseReg, TII, TRI);  in DistributeIncrements()
3265     BaseAccess->eraseFromParent();  in DistributeIncrements()