Lines Matching +full:21 +full:b0000
739 let Inst{24-21} = opcod;
750 let Inst{24-21} = opcod;
774 let Inst{24-21} = opcod;
836 let Inst{24-21} = opcod;
847 let Inst{24-21} = opcod;
860 let Inst{24-21} = opcod;
937 let Inst{23-21} = op23_21;
951 let Inst{23-21} = op23_21;
967 let Inst{23-21} = op23_21;
986 let Inst{23-21} = op23_21;
1004 let Inst{23-21} = op23_21;
1018 let Inst{23-21} = op23_21;
1035 let Inst{24-21} = opcod;
1046 let Inst{24-21} = opcod;
1059 let Inst{24-21} = opcod;
1093 let Inst{26-21} = 0b010010;
1106 let Inst{22-21} = opcod;
1108 let Inst{7-4} = 0b0000;
1150 let Inst{24-21} = opcod;
1162 let Inst{24-21} = opcod;
1177 let Inst{24-21} = opcod;
1205 let Inst{22-21} = opcod;
1223 let Inst{22-21} = opcod;
1244 let Inst{22-21} = opcod;
1269 let Inst{22-21} = opcod;
1294 let Inst{22-21} = opcod;
1311 let Inst{26-23} = 0b0000;
1312 let Inst{22-21} = opcod;
1332 let Inst{26-23} = 0b0000;
1333 let Inst{22-21} = opcod;
1425 // Inst{23:21} = '11' (add = FALSE) or '00' (add = TRUE)
1435 let Inst{21} = addr{12};
1650 let Inst{22-21} = type;
1835 let Inst{22-21} = type;
1922 let Inst{21} = write;
1941 let Inst{21} = write;
1961 let Inst{21} = write;
2063 let Inst{21} = 0; // No writeback
2078 let Inst{21} = 1; // Writeback
2093 let Inst{21} = 0; // No writeback
2108 let Inst{21} = 1; // Writeback
2132 let Inst{21} = 0; // No writeback
2150 let Inst{21} = 1; // Writeback
2168 let Inst{21} = 0; // No writeback
2186 let Inst{21} = 1; // Writeback
2212 let Inst{24-21} = 0b0010;
2216 let Inst{7-4} = 0b0000;
2233 let Inst{24-21} = 0b0010;
2257 let Inst{24-21} = 0b0010;
2292 let Inst{24-21} = 0b0110;
2624 def t2SASX : T2I_pam_intrinsics<0b010, 0b0000, "sasx", int_arm_sasx>;
2625 def t2SADD16 : T2I_pam_intrinsics<0b001, 0b0000, "sadd16", int_arm_sadd16>;
2626 def t2SADD8 : T2I_pam_intrinsics<0b000, 0b0000, "sadd8", int_arm_sadd8>;
2627 def t2SSAX : T2I_pam_intrinsics<0b110, 0b0000, "ssax", int_arm_ssax>;
2628 def t2SSUB16 : T2I_pam_intrinsics<0b101, 0b0000, "ssub16", int_arm_ssub16>;
2629 def t2SSUB8 : T2I_pam_intrinsics<0b100, 0b0000, "ssub8", int_arm_ssub8>;
2676 def t2USAD8 : T2ThreeReg_mac<0, 0b111, 0b0000, (outs rGPR:$Rd),
2683 def t2USADA8 : T2FourReg_mac<0, 0b111, 0b0000, (outs rGPR:$Rd),
2698 let Inst{21} = sh{5};
2794 let Inst{24-21} = 0b0010;
2811 let Inst{24-21} = 0b0010;
2826 let Inst{24-21} = 0b0010;
2840 defm t2AND : T2I_bin_w_irs<0b0000, "and",
2970 let Inst{24-21} = opcod;
2980 let Inst{24-21} = opcod;
2993 let Inst{24-21} = opcod;
3045 let Inst{7-4} = 0b0000; // Multiply
3059 def t2MLA : T2FourRegMLA<0b0000, "mla",
3069 def t2SMULL : T2MulLong<0b000, 0b0000, "smull",
3072 def t2UMULL : T2MulLong<0b010, 0b0000, "umull",
3078 def t2SMLAL : T2MlaLong<0b100, 0b0000, "smlal">;
3079 def t2UMLAL : T2MlaLong<0b110, 0b0000, "umlal">;
3098 def t2SMMUL : T2SMMUL<0b0000, "smmul", [(set rGPR:$Rd, (mulhs rGPR:$Rn,
3116 def t2SMMLA : T2FourRegSMMLA<0b101, 0b0000, "smmla",
3120 def t2SMMLS: T2FourRegSMMLA<0b110, 0b0000, "smmls", []>;
3254 def t2SMUAD: T2DualHalfMul<0b010, 0b0000, "smuad", int_arm_smuad>;
3256 def t2SMUSD: T2DualHalfMul<0b100, 0b0000, "smusd", int_arm_smusd>;
3268 def t2SMLAD : T2DualHalfMulAdd<0b010, 0b0000, "smlad", int_arm_smlad>;
3270 def t2SMLSD : T2DualHalfMulAdd<0b100, 0b0000, "smlsd", int_arm_smlsd>;
3306 let Inst{26-21} = 0b011100;
3318 let Inst{26-21} = 0b011101;
3333 let Inst{21-20} = op1;
3447 let Inst{26-21} = 0b010110;
3483 let Inst{24-21} = 0b1000;
3496 let Inst{24-21} = 0b1000;
3512 let Inst{24-21} = 0b1000;
3532 defm t2TST : T2I_cmp_irs<0b0000, "tst", rGPR,
3948 let Inst{11} = target{21};
4016 bits<21> target;
4020 let Inst{21-16} = target{17-12};
4217 let Inst{21} = W;
4396 let Inst{21} = 0; // W = 0
4413 let Inst{21} = 1; // W = 1
4432 let Inst{21} = 1; // W = 1
4451 let Inst{21} = 0; // W = 0
4506 let Inst{31-21} = 0b11110011111;
4513 let Inst{3-0} = 0b0000;
4549 let Inst{31-21} = 0b11110011100;
4565 let Inst{31-21} = 0b11110011100;
4572 let Inst{3-0} = 0b0000;
4585 let Inst{31-21} = 0b11110011100;
4620 let Inst{23-21} = opc1;
4632 let Inst{23-21} = 0b010;
5490 let Inst{22-21} = 0b10;
5507 let Inst{21-18} = bcond{3-0};
5786 let Inst{7-4} = 0b0000;