Lines Matching refs:pred
335 def : tHintAlias<"nop$p", (tHINT 0, pred:$p), 1>; // A8.6.110
336 def : tHintAlias<"yield$p", (tHINT 1, pred:$p), 1>; // A8.6.410
337 def : tHintAlias<"wfe$p", (tHINT 2, pred:$p), 1>; // A8.6.408
338 def : tHintAlias<"wfi$p", (tHINT 3, pred:$p), 1>; // A8.6.409
339 def : tHintAlias<"sev$p", (tHINT 4, pred:$p), 1>; // A8.6.157
340 def : tInstAlias<"sevl$p", (tHINT 5, pred:$p), 1> {
444 (tSUBspi SP, t_imm0_508s4_neg:$imm, pred:$p)>;
446 (tSUBspi SP, t_imm0_508s4_neg:$imm, pred:$p)>;
450 (tADDspi SP, t_imm0_508s4:$imm, pred:$p)>;
452 (tSUBspi SP, t_imm0_508s4:$imm, pred:$p)>;
484 def tBX : TI<(outs), (ins GPR:$Rm, pred:$p), IIC_Br, "bx${p}\t$Rm", []>,
492 def tBXNS : TI<(outs), (ins GPR:$Rm, pred:$p), IIC_Br, "bxns${p}\t$Rm", []>,
503 def tBX_RET : tPseudoExpand<(outs), (ins pred:$p), 2, IIC_Br,
504 [(ARMretglue)], (tBX LR, pred:$p)>, Sched<[WriteBr]>;
511 def tBX_RET_vararg : tPseudoExpand<(outs), (ins tGPR:$Rm, pred:$p),
513 (tBX GPR:$Rm, pred:$p)>, Sched<[WriteBr]>;
523 (outs), (ins pred:$p, thumb_bl_target:$func), IIC_Br,
537 (outs), (ins pred:$p, thumb_blx_target:$func), IIC_Br,
550 def tBLXr : TI<(outs), (ins pred:$p, GPR:$func), IIC_Br,
558 def tBLXr_noip : ARMPseudoExpand<(outs), (ins pred:$p, GPRnoip:$func),
559 2, IIC_Br, [], (tBLXr pred:$p, GPR:$func)>,
565 def tBLXNSr : TI<(outs), (ins pred:$p, GPRnopc:$func), IIC_Br,
587 def tBL_PUSHLR : tPseudoInst<(outs), (ins GPRlr:$ra, pred:$p, thumb_bl_target:$func),
612 def tBfar : tPseudoExpand<(outs), (ins thumb_bl_target:$target, pred:$p),
614 (tBL pred:$p, thumb_bl_target:$target)>,
631 def tBcc : T1I<(outs), (ins thumb_bcc_target:$target, pred:$p), IIC_Br,
657 (ins t_brtarget:$dst, pred:$p),
659 (tB t_brtarget:$dst, pred:$p)>,
826 def tLDMIA : T1I<(outs), (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops),
841 PseudoInstExpansion<(tLDMIA tGPR:$Rn, pred:$p, reglist:$regs)> {
844 let InOperandList = (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops);
854 (ins tGPR:$Rn, pred:$p, reglist:$regs, variable_ops),
867 (tLDMIA tGPR:$Rn, pred:$p, reglist:$regs), 0>,
872 def tPOP : T1I<(outs), (ins pred:$p, reglist:$regs, variable_ops),
882 def tPUSH : T1I<(outs), (ins pred:$p, reglist:$regs, variable_ops),
1061 (tADDrr tGPR:$Rdn,s_cc_out:$s, tGPR:$Rdn, tGPR:$Rm, pred:$p)>;
1064 (tADDi3 tGPR:$rd, s_cc_out:$s, tGPR:$rn, mod_imm1_7_neg:$imm, pred:$p)>;
1066 (tADDi8 tGPR:$rdn, s_cc_out:$s, mod_imm8_255_neg:$imm, pred:$p)>;
1256 pred:$p)>;
1337 (tSUBi3 tGPR:$rd, s_cc_out:$s, tGPR:$rn, mod_imm1_7_neg:$imm, pred:$p)>;
1341 (tSUBi8 tGPR:$rdn, s_cc_out:$s, mod_imm8_255_neg:$imm, pred:$p)>;
1353 (tSUBrr tGPR:$Rdn,s_cc_out:$s, tGPR:$Rdn, tGPR:$Rm, pred:$p)>;
1476 def tADR : T1I<(outs tGPR:$Rd), (ins t_adrlabel:$addr, pred:$p),
1487 def tLEApcrel : tPseudoInst<(outs tGPR:$Rd), (ins i32imm:$label, pred:$p),
1492 (ins i32imm:$label, pred:$p),
1667 (ins tGPR:$Rn, pred:$p),
1751 def tPOP_RET : tPseudoExpand<(outs), (ins pred:$p, reglist:$regs, variable_ops),
1753 (tPOP pred:$p, reglist:$regs)>, Sched<[WriteBrL]>;
1757 def tBRIND : tPseudoExpand<(outs), (ins GPR:$Rm, pred:$p),
1759 (tMOVr PC, GPR:$Rm, pred:$p)>, Sched<[WriteBr]>;
1770 (tRSB tGPR:$Rd, s_cc_out:$s, tGPR:$Rm, pred:$p)>;
1775 (tLSLri tGPR:$Rdm, cc_out:$s, tGPR:$Rdm, imm0_31:$imm, pred:$p)>;
1777 (tLSRri tGPR:$Rdm, cc_out:$s, tGPR:$Rdm, imm_sr:$imm, pred:$p)>;
1779 (tASRri tGPR:$Rdm, cc_out:$s, tGPR:$Rdm, imm_sr:$imm, pred:$p)>;
1784 (ins tGPR:$Rt, const_pool_asm_imm:$immediate, pred:$p)>;