Lines Matching full:rm
395 let Inst{6-3} = 0b1111; // Rm = pc
454 // ADD <Rm>, sp
466 // ADD sp, <Rm>
467 def tADDspr : T1pIt<(outs GPRsp:$Rdn), (ins GPRsp:$Rn, GPR:$Rm), IIC_iALUr,
468 "add", "\t$Rdn, $Rm", []>,
471 bits<4> Rm;
473 let Inst{6-3} = Rm;
484 def tBX : TI<(outs), (ins GPR:$Rm, pred:$p), IIC_Br, "bx${p}\t$Rm", []>,
487 bits<4> Rm;
488 let Inst{6-3} = Rm;
492 def tBXNS : TI<(outs), (ins GPR:$Rm, pred:$p), IIC_Br, "bxns${p}\t$Rm", []>,
495 bits<4> Rm;
496 let Inst{6-3} = Rm;
511 def tBX_RET_vararg : tPseudoExpand<(outs), (ins tGPR:$Rm, pred:$p),
513 (tBX GPR:$Rm, pred:$p)>, Sched<[WriteBr]>;
900 bits<3> Rm;
902 let Inst{5-3} = Rm;
909 bits<3> Rm;
911 let Inst{5-3} = Rm;
929 bits<3> Rm;
932 let Inst{8-6} = Rm;
941 bits<3> Rm;
942 let Inst{5-3} = Rm;
952 bits<3> Rm;
953 let Inst{5-3} = Rm;
970 T1sItDPEncode<0b0101, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm), IIC_iALUr,
971 "adc", "\t$Rdn, $Rm",
976 T1sIGenEncodeImm<0b01110, (outs tGPR:$Rd), (ins tGPR:$Rm, imm0_7:$imm3),
978 "add", "\t$Rd, $Rm, $imm3",
979 [(set tGPR:$Rd, (add tGPR:$Rm, imm0_7:$imm3))]>,
995 T1sIGenEncode<0b01100, (outs tGPR:$Rd), (ins tGPR:$Rn, tGPR:$Rm),
997 "add", "\t$Rd, $Rn, $Rm",
998 [(set tGPR:$Rd, (add tGPR:$Rn, tGPR:$Rm))]>,
1008 def tADCS : tPseudoInst<(outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1010 [(set tGPR:$Rdn, CPSR, (ARMadde tGPR:$Rn, tGPR:$Rm,
1015 def tADDSi3 : tPseudoInst<(outs tGPR:$Rd), (ins tGPR:$Rm, imm0_7:$imm3),
1017 [(set tGPR:$Rd, CPSR, (ARMaddc tGPR:$Rm,
1030 def tADDSrr : tPseudoInst<(outs tGPR:$Rd), (ins tGPR:$Rn, tGPR:$Rm),
1033 tGPR:$Rm))]>,
1039 def tADDhirr : T1pIt<(outs GPR:$Rdn), (ins GPR:$Rn, GPR:$Rm), IIC_iALUr,
1040 "add", "\t$Rdn, $Rm", []>,
1044 bits<4> Rm;
1046 let Inst{6-3} = Rm;
1057 def : T1Pat<(or AddLikeOrOp:$Rn, tGPR:$Rm), (tADDrr $Rn, $Rm)>;
1060 def : tInstAlias <"add${s}${p} $Rdn, $Rm",
1061 (tADDrr tGPR:$Rdn,s_cc_out:$s, tGPR:$Rdn, tGPR:$Rm, pred:$p)>;
1072 T1sItDPEncode<0b0000, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1074 "and", "\t$Rdn, $Rm",
1075 [(set tGPR:$Rdn, (and tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1079 T1sIGenEncodeImm<{0,1,0,?,?}, (outs tGPR:$Rd), (ins tGPR:$Rm, imm_sr:$imm5),
1081 "asr", "\t$Rd, $Rm, $imm5",
1082 [(set tGPR:$Rd, (sra tGPR:$Rm, (i32 imm_sr:$imm5)))]>,
1090 T1sItDPEncode<0b0100, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1092 "asr", "\t$Rdn, $Rm",
1093 [(set tGPR:$Rdn, (sra tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1097 T1sItDPEncode<0b1110, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1099 "bic", "\t$Rdn, $Rm",
1100 [(set tGPR:$Rdn, (and tGPR:$Rn, (not tGPR:$Rm)))]>,
1114 T1pIDPEncode<0b1011, (outs), (ins tGPR:$Rn, tGPR:$Rm),
1116 "cmn", "\t$Rn, $Rm",
1117 [(ARMcmpZ tGPR:$Rn, (ineg tGPR:$Rm))]>, Sched<[WriteCMP]>;
1136 T1pIDPEncode<0b1010, (outs), (ins tGPR:$Rn, tGPR:$Rm),
1138 "cmp", "\t$Rn, $Rm",
1139 [(ARMcmp tGPR:$Rn, tGPR:$Rm)]>, Sched<[WriteCMP]>;
1141 def tCMPhir : T1pI<(outs), (ins GPR:$Rn, GPR:$Rm), IIC_iCMPr,
1142 "cmp", "\t$Rn, $Rm", []>,
1145 bits<4> Rm;
1148 let Inst{6-3} = Rm;
1157 T1sItDPEncode<0b0001, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1159 "eor", "\t$Rdn, $Rm",
1160 [(set tGPR:$Rdn, (xor tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1164 T1sIGenEncodeImm<{0,0,0,?,?}, (outs tGPR:$Rd), (ins tGPR:$Rm, imm0_31:$imm5),
1166 "lsl", "\t$Rd, $Rm, $imm5",
1167 [(set tGPR:$Rd, (shl tGPR:$Rm, (i32 imm:$imm5)))]>,
1175 T1sItDPEncode<0b0010, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1177 "lsl", "\t$Rdn, $Rm",
1178 [(set tGPR:$Rdn, (shl tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1182 T1sIGenEncodeImm<{0,0,1,?,?}, (outs tGPR:$Rd), (ins tGPR:$Rm, imm_sr:$imm5),
1184 "lsr", "\t$Rd, $Rm, $imm5",
1185 [(set tGPR:$Rd, (srl tGPR:$Rm, (i32 imm_sr:$imm5)))]>,
1193 T1sItDPEncode<0b0011, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1195 "lsr", "\t$Rdn, $Rm",
1196 [(set tGPR:$Rdn, (srl tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1218 def tMOVr : Thumb1pI<(outs GPR:$Rd), (ins GPR:$Rm), AddrModeNone,
1220 "mov", "\t$Rd, $Rm", "", []>,
1224 bits<4> Rm;
1226 let Inst{6-3} = Rm;
1230 def tMOVSr : T1I<(outs tGPR:$Rd), (ins tGPR:$Rm), IIC_iMOVr,
1231 "movs\t$Rd, $Rm", []>, Encoding16, Sched<[WriteALU]> {
1234 bits<3> Rm;
1236 let Inst{5-3} = Rm;
1244 Thumb1sI<(outs tGPR:$Rd), (ins tGPR:$Rn, tGPR:$Rm), AddrModeNone, 2,
1245 IIC_iMUL32, "mul", "\t$Rd, $Rn, $Rm", "$Rm = $Rd",
1246 [(set tGPR:$Rd, (mul tGPR:$Rn, tGPR:$Rm))]>,
1267 T1sItDPEncode<0b1100, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1269 "orr", "\t$Rdn, $Rm",
1270 [(set tGPR:$Rdn, (or tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
1274 T1pIMiscEncode<{1,0,1,0,0,0,?}, (outs tGPR:$Rd), (ins tGPR:$Rm),
1276 "rev", "\t$Rd, $Rm",
1277 [(set tGPR:$Rd, (bswap tGPR:$Rm))]>,
1281 T1pIMiscEncode<{1,0,1,0,0,1,?}, (outs tGPR:$Rd), (ins tGPR:$Rm),
1283 "rev16", "\t$Rd, $Rm",
1284 [(set tGPR:$Rd, (rotr (bswap tGPR:$Rm), (i32 16)))]>,
1288 T1pIMiscEncode<{1,0,1,0,1,1,?}, (outs tGPR:$Rd), (ins tGPR:$Rm),
1290 "revsh", "\t$Rd, $Rm",
1291 [(set tGPR:$Rd, (sra (bswap tGPR:$Rm), (i32 16)))]>,
1296 T1sItDPEncode<0b0111, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1298 "ror", "\t$Rdn, $Rm",
1299 [(set tGPR:$Rdn, (rotr tGPR:$Rn, tGPR:$Rm))]>,
1312 T1sItDPEncode<0b0110, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1314 "sbc", "\t$Rdn, $Rm",
1320 T1sIGenEncodeImm<0b01111, (outs tGPR:$Rd), (ins tGPR:$Rm, imm0_7:$imm3),
1322 "sub", "\t$Rd, $Rm, $imm3",
1323 [(set tGPR:$Rd, (add tGPR:$Rm, imm0_7_neg:$imm3))]>,
1346 T1sIGenEncode<0b01101, (outs tGPR:$Rd), (ins tGPR:$Rn, tGPR:$Rm),
1348 "sub", "\t$Rd, $Rn, $Rm",
1349 [(set tGPR:$Rd, (sub tGPR:$Rn, tGPR:$Rm))]>,
1352 def : tInstAlias <"sub${s}${p} $Rdn, $Rm",
1353 (tSUBrr tGPR:$Rdn,s_cc_out:$s, tGPR:$Rdn, tGPR:$Rm, pred:$p)>;
1362 def tSBCS : tPseudoInst<(outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
1364 [(set tGPR:$Rdn, CPSR, (ARMsube tGPR:$Rn, tGPR:$Rm,
1369 def tSUBSi3 : tPseudoInst<(outs tGPR:$Rd), (ins tGPR:$Rm, imm0_7:$imm3),
1371 [(set tGPR:$Rd, CPSR, (ARMsubc tGPR:$Rm,
1383 def tSUBSrr : tPseudoInst<(outs tGPR:$Rd), (ins tGPR:$Rn, tGPR:$Rm),
1386 tGPR:$Rm))]>,
1405 T1pIMiscEncode<{0,0,1,0,0,1,?}, (outs tGPR:$Rd), (ins tGPR:$Rm),
1407 "sxtb", "\t$Rd, $Rm",
1408 [(set tGPR:$Rd, (sext_inreg tGPR:$Rm, i8))]>,
1414 T1pIMiscEncode<{0,0,1,0,0,0,?}, (outs tGPR:$Rd), (ins tGPR:$Rm),
1416 "sxth", "\t$Rd, $Rm",
1417 [(set tGPR:$Rd, (sext_inreg tGPR:$Rm, i16))]>,
1424 T1pIDPEncode<0b1000, (outs), (ins tGPR:$Rn, tGPR:$Rm), IIC_iTSTr,
1425 "tst", "\t$Rn, $Rm",
1426 [(ARMcmpZ (and_su tGPR:$Rn, tGPR:$Rm), 0)]>,
1450 T1pIMiscEncode<{0,0,1,0,1,1,?}, (outs tGPR:$Rd), (ins tGPR:$Rm),
1452 "uxtb", "\t$Rd, $Rm",
1453 [(set tGPR:$Rd, (and tGPR:$Rm, 0xFF))]>,
1459 T1pIMiscEncode<{0,0,1,0,1,0,?}, (outs tGPR:$Rd), (ins tGPR:$Rm),
1461 "uxth", "\t$Rd, $Rm",
1462 [(set tGPR:$Rd, (and tGPR:$Rm, 0xFFFF))]>,
1569 def : T1Pat<(ARMcmpZ tGPR:$Rn, tGPR:$Rm),
1570 (tCMPr tGPR:$Rn, tGPR:$Rm)>;
1755 // Indirect branch using "mov pc, $Rm"
1757 def tBRIND : tPseudoExpand<(outs), (ins GPR:$Rm, pred:$p),
1758 2, IIC_Br, [(brind GPR:$Rm)],
1759 (tMOVr PC, GPR:$Rm, pred:$p)>, Sched<[WriteBr]>;
1769 def : tInstAlias<"neg${s}${p} $Rd, $Rm",
1770 (tRSB tGPR:$Rd, s_cc_out:$s, tGPR:$Rm, pred:$p)>;