Lines Matching refs:AddrMode
599 class VLD1D<bits<4> op7_4, string Dt, Operand AddrMode>
601 (ins AddrMode:$Rn), IIC_VLD1,
607 class VLD1Q<bits<4> op7_4, string Dt, Operand AddrMode>
609 (ins AddrMode:$Rn), IIC_VLD1x2,
627 multiclass VLD1DWB<bits<4> op7_4, string Dt, Operand AddrMode> {
629 (ins AddrMode:$Rn), IIC_VLD1u,
637 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1u,
644 multiclass VLD1QWB<bits<4> op7_4, string Dt, Operand AddrMode> {
646 (ins AddrMode:$Rn), IIC_VLD1x2u,
654 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1x2u,
672 class VLD1D3<bits<4> op7_4, string Dt, Operand AddrMode>
674 (ins AddrMode:$Rn), IIC_VLD1x3, "vld1", Dt,
680 multiclass VLD1D3WB<bits<4> op7_4, string Dt, Operand AddrMode> {
682 (ins AddrMode:$Rn), IIC_VLD1x2u,
690 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1x2u,
735 class VLD1D4<bits<4> op7_4, string Dt, Operand AddrMode>
737 (ins AddrMode:$Rn), IIC_VLD1x4, "vld1", Dt,
743 multiclass VLD1D4WB<bits<4> op7_4, string Dt, Operand AddrMode> {
745 (ins AddrMode:$Rn), IIC_VLD1x2u,
753 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1x2u,
799 InstrItinClass itin, Operand AddrMode>
801 (ins AddrMode:$Rn), itin,
828 RegisterOperand VdTy, InstrItinClass itin, Operand AddrMode> {
830 (ins AddrMode:$Rn), itin,
838 (ins AddrMode:$Rn, rGPR:$Rm), itin,
1371 Operand AddrMode>
1373 (ins AddrMode:$Rn),
1376 (Ty (ARMvdup (i32 (LoadOp AddrMode:$Rn)))))]>,
1395 Operand AddrMode>
1397 (ins AddrMode:$Rn), IIC_VLD1dup,
1400 (Ty (ARMvdup (i32 (LoadOp AddrMode:$Rn)))))]> {
1420 multiclass VLD1DUPWB<bits<4> op7_4, string Dt, Operand AddrMode> {
1423 (ins AddrMode:$Rn), IIC_VLD1dupu,
1432 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1dupu,
1439 multiclass VLD1QDUPWB<bits<4> op7_4, string Dt, Operand AddrMode> {
1442 (ins AddrMode:$Rn), IIC_VLD1dupu,
1451 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1dupu,
1468 class VLD2DUP<bits<4> op7_4, string Dt, RegisterOperand VdTy, Operand AddrMode>
1470 (ins AddrMode:$Rn), IIC_VLD2dup,
1517 Operand AddrMode> {
1520 (ins AddrMode:$Rn), IIC_VLD2dupu,
1529 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD2dupu,
1590 class VLD3DUPWB<bits<4> op7_4, string Dt, Operand AddrMode>
1592 (ins AddrMode:$Rn, am6offset:$Rm), IIC_VLD3dupu,
1716 class VST1D<bits<4> op7_4, string Dt, Operand AddrMode>
1717 : NLdSt<0,0b00,0b0111,op7_4, (outs), (ins AddrMode:$Rn, VecListOneD:$Vd),
1723 class VST1Q<bits<4> op7_4, string Dt, Operand AddrMode>
1724 : NLdSt<0,0b00,0b1010,op7_4, (outs), (ins AddrMode:$Rn, VecListDPair:$Vd),
1742 multiclass VST1DWB<bits<4> op7_4, string Dt, Operand AddrMode> {
1744 (ins AddrMode:$Rn, VecListOneD:$Vd), IIC_VLD1u,
1752 (ins AddrMode:$Rn, rGPR:$Rm, VecListOneD:$Vd),
1760 multiclass VST1QWB<bits<4> op7_4, string Dt, Operand AddrMode> {
1762 (ins AddrMode:$Rn, VecListDPair:$Vd), IIC_VLD1x2u,
1770 (ins AddrMode:$Rn, rGPR:$Rm, VecListDPair:$Vd),
1790 class VST1D3<bits<4> op7_4, string Dt, Operand AddrMode>
1792 (ins AddrMode:$Rn, VecListThreeD:$Vd),
1798 multiclass VST1D3WB<bits<4> op7_4, string Dt, Operand AddrMode> {
1800 (ins AddrMode:$Rn, VecListThreeD:$Vd), IIC_VLD1x3u,
1808 (ins AddrMode:$Rn, rGPR:$Rm, VecListThreeD:$Vd),
1856 class VST1D4<bits<4> op7_4, string Dt, Operand AddrMode>
1858 (ins AddrMode:$Rn, VecListFourD:$Vd),
1865 multiclass VST1D4WB<bits<4> op7_4, string Dt, Operand AddrMode> {
1867 (ins AddrMode:$Rn, VecListFourD:$Vd), IIC_VLD1x4u,
1875 (ins AddrMode:$Rn, rGPR:$Rm, VecListFourD:$Vd),
1924 InstrItinClass itin, Operand AddrMode>
1925 : NLdSt<0, 0b00, op11_8, op7_4, (outs), (ins AddrMode:$Rn, VdTy:$Vd),
1952 RegisterOperand VdTy, Operand AddrMode> {
1954 (ins AddrMode:$Rn, VdTy:$Vd), IIC_VLD1u,
1962 (ins AddrMode:$Rn, rGPR:$Rm, VdTy:$Vd), IIC_VLD1u,
1969 multiclass VST2QWB<bits<4> op7_4, string Dt, Operand AddrMode> {
1971 (ins AddrMode:$Rn, VecListFourD:$Vd), IIC_VLD1u,
1979 (ins AddrMode:$Rn, rGPR:$Rm, VecListFourD:$Vd),
2165 PatFrag StoreOp, SDNode ExtractOp, Operand AddrMode>
2167 (ins AddrMode:$Rn, DPR:$Vd, nohash_imm:$lane),
2169 [(StoreOp (ExtractOp (Ty DPR:$Vd), imm:$lane), AddrMode:$Rn)]>,