Lines Matching refs:RdaLo

501   : MVE_ScalarShift<iname, (outs tGPREven:$RdaLo, tGPROdd:$RdaHi),
503   bits<4> RdaLo;
506   let Inst{19-17} = RdaLo{3-1};
516       "$RdaLo, $RdaHi, $imm", "$RdaLo = $RdaLo_src,$RdaHi = $RdaHi_src",
531      iname, iops, asm, "@earlyclobber $RdaHi,@earlyclobber $RdaLo,"
532                        "$RdaLo = $RdaLo_src,$RdaHi = $RdaHi_src",
554      "$RdaLo, $RdaHi, $Rm", op5, 0b0, pattern> {
562      "$RdaLo, $RdaHi, $sat, $Rm", op5, 0b1, pattern> {
568 def MVE_ASRLr   : MVE_ScalarShiftDRegReg<"asrl",    0b1,  [(set tGPREven:$RdaLo, tGPROdd:$RdaHi,
571 def MVE_ASRLi   : MVE_ScalarShiftDRegImm<"asrl",    0b10, ?, [(set tGPREven:$RdaLo, tGPROdd:$RdaHi,
574 def MVE_LSLLr   : MVE_ScalarShiftDRegReg<"lsll",    0b0,  [(set tGPREven:$RdaLo, tGPROdd:$RdaHi,
577 def MVE_LSLLi   : MVE_ScalarShiftDRegImm<"lsll",    0b00, ?, [(set tGPREven:$RdaLo, tGPROdd:$RdaHi,
580 def MVE_LSRL    : MVE_ScalarShiftDRegImm<"lsrl",    0b01, ?, [(set tGPREven:$RdaLo, tGPROdd:$RdaHi,
760   : MVE_rDest<(outs tGPREven:$RdaLo, tGPROdd:$RdaHi), iops, NoItinerary, iname,
761               suffix, "$RdaLo, $RdaHi, $Qm", cstr, 0b10, pattern> {
763   bits<4> RdaLo;
770   let Inst{15-13} = RdaLo{3-1};
797                         "$RdaLo = $RdaLo_src,$RdaHi = $RdaHi_src",
1314 def : MVEInstAlias<"vrmlalvh${vp}.s32\t$RdaLo, $RdaHi, $Qn, $Qm",
1316                    tGPREven:$RdaLo, tGPROdd:$RdaHi,
1318 def : MVEInstAlias<"vrmlalvha${vp}.s32\t$RdaLo, $RdaHi, $Qn, $Qm",
1320                    tGPREven:$RdaLo, tGPROdd:$RdaHi,
1322 def : MVEInstAlias<"vrmlalvh${vp}.u32\t$RdaLo, $RdaHi, $Qn, $Qm",
1324                    tGPREven:$RdaLo, tGPROdd:$RdaHi,
1326 def : MVEInstAlias<"vrmlalvha${vp}.u32\t$RdaLo, $RdaHi, $Qn, $Qm",
1328                    tGPREven:$RdaLo, tGPROdd:$RdaHi,