Lines Matching +full:5 +full:b110000

464   bits<5> imm;
470 let Inst{5-4} = op5_4{1-0};
490 let Inst{5-4} = op5_4{1-0};
518 bits<5> imm;
524 let Inst{5-4} = op5_4{1-0};
539 let Inst{5} = op5;
624 let Inst{5} = Qm{3};
674 let Inst{5} = A;
773 let Inst{5} = A;
791 SDTCisVec<4>, SDTCisVec<5>
845 let Inst{6-5} = 0b00;
906 let Inst{6-5} = 0b00;
1033 let Inst{5} = A;
1135 SDTCisVec<4>, SDTCisVec<5>
1143 def SDTVecReduce2LAP : SDTypeProfile<2, 5, [ // VMLALVA
1145 SDTCisVec<4>, SDTCisVec<5>, SDTCisVec<6>
1269 let Inst{5} = A;
1419 let Inst{5} = Qm{3};
1511 let Inst{5} = Qm{3};
1594 let Inst{21-16} = 0b110000;
1711 let Inst{5} = opcode;
1798 let Inst{6-5} = 0b00;
1810 let Inst{5} = 0b1;
1825 let Inst{5} = Idx{0};
1955 let Inst{5} = Qm{3};
2390 let Inst{5} = E;
2451 let Inst{5} = Qm{3};
2604 let Inst{5} = op;
2678 let Inst{5} = Qm{3};
2725 bits<5> imm;
2748 let Inst{5} = Qm{3};
2942 bits<5> imm;
2985 bits<5> imm;
3036 bits<5> imm;
3155 let Inst{5} = Qm{3};
3221 let Inst{5} = Qm{3};
3554 let Inst{5} = Qm{3};
4151 let Inst{5} = Qm{3};
4214 let Inst{5} = Qm{3};
4288 let Inst{5} = fc{1};
4306 let Inst{5} = 0b0;
4312 let Inst{5} = 0b1;
4540 let Inst{5} = Qm{3};
5254 let Inst{5} = bit_5;
5322 let Inst{5} = 0b1;
5369 let Inst{5} = 0b0;
5499 let Inst{5} = 0b1;
5549 let Inst{5} = 0b1;
5574 let Inst{5} = 0b1;
5626 let Inst{5} = 0b0;
5723 let Inst{5} = bit_5;
5872 bits<5> Rt;
5873 bits<5> Rt2;
5884 let Inst{12-5} = 0b01111000;
5934 // insertelt's will be in descending order by index, and need to match the 5
5988 let Inst{6-5} = stage;
6076 def SDTARMVST2 : SDTypeProfile<1, 5, [SDTCisPtrTy<0>, SDTCisPtrTy<1>, SDTCisVT<2, i32>, SDTCisVec<3>,
6077 SDTCisSameAs<3, 4>, SDTCisVT<5, i32>]>;
6079 SDTCisSameAs<3, 4>, SDTCisSameAs<3, 5>,
6350 let Inst{5} = 0;
6612 let Inst{5} = Qm{3};
6657 let Inst{5} = fc{1};
6665 let Inst{5} = 0b0;
6676 let Inst{5} = 0b1;
6726 let Inst{5} = Qm{3};
6741 let Inst{5} = fc{1};
6759 let Unpredictable{5} = 0b1;
6782 let Inst{5} = Qm{3};
6887 let Unpredictable{5} = 0b1;