Lines Matching refs:opc1

4608 class SMLAL<bits<2> opc1, string asm>
4609  : AMulxyI64<0b0001010, opc1,
5389 def CDP : ABI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
5391             NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
5392             [(int_arm_cdp timm:$cop, timm:$opc1, timm:$CRd, timm:$CRn,
5395   bits<4> opc1;
5408   let Inst{23-20} = opc1;
5413 def CDP2 : ABXI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
5415                NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
5416                [(int_arm_cdp2 timm:$cop, timm:$opc1, timm:$CRd, timm:$CRn,
5420   bits<4> opc1;
5433   let Inst{23-20} = opc1;
5619         "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2", pattern> {
5625   bits<3> opc1;
5632   let Inst{23-21} = opc1;
5642                     (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5644                     [(int_arm_mcr timm:$cop, timm:$opc1, GPR:$Rt, timm:$CRn,
5647 def : ARMInstAlias<"mcr${p} $cop, $opc1, $Rt, $CRn, $CRm",
5648                    (MCR p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5652                     (ins p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm,
5655 def : ARMInstAlias<"mrc${p} $cop, $opc1, $Rt, $CRn, $CRm",
5656                    (MRC GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
5659 def : ARMPat<(int_arm_mrc timm:$cop, timm:$opc1, timm:$CRn, timm:$CRm, timm:$opc2),
5660              (MRC p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2)>;
5665          !strconcat(opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2"), pattern> {
5672   bits<3> opc1;
5679   let Inst{23-21} = opc1;
5689                       (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5691                       [(int_arm_mcr2 timm:$cop, timm:$opc1, GPR:$Rt, timm:$CRn,
5694 def : ARMInstAlias<"mcr2 $cop, $opc1, $Rt, $CRn, $CRm",
5695                    (MCR2 p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,
5699                       (ins p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm,
5702 def : ARMInstAlias<"mrc2 $cop, $opc1, $Rt, $CRn, $CRm",
5703                    (MRC2 GPRwithAPSR:$Rt, p_imm:$cop, imm0_7:$opc1, c_imm:$CRn,
5706 def : ARMV5TPat<(int_arm_mrc2 timm:$cop, timm:$opc1, timm:$CRn,
5708                 (MRC2 p_imm:$cop, imm0_7:$opc1, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2)>;
5712   : ABI<0b1100, oops, iops, NoItinerary, opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm",
5721   bits<4> opc1;
5727   let Inst{7-4}   = opc1;
5732                       (outs), (ins p_imm:$cop, imm0_15:$opc1, GPRnopc:$Rt,
5734                       [(int_arm_mcrr timm:$cop, timm:$opc1, GPRnopc:$Rt,
5738                       (ins p_imm:$cop, imm0_15:$opc1, c_imm:$CRm), []>;
5743          !strconcat(opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm"), pattern>,
5752   bits<4> opc1;
5758   let Inst{7-4}   = opc1;
5765                         (outs), (ins p_imm:$cop, imm0_15:$opc1, GPRnopc:$Rt,
5767                         [(int_arm_mcrr2 timm:$cop, timm:$opc1, GPRnopc:$Rt,
5772                        (ins p_imm:$cop, imm0_15:$opc1, c_imm:$CRm), []>;