Lines Matching refs:NewVReg1

10840     Register NewVReg1 = MRI->createVirtualRegister(TRC);  in SetupEntryBlockForSjLj()  local
10841 BuildMI(*MBB, MI, dl, TII->get(ARM::t2LDRpci), NewVReg1) in SetupEntryBlockForSjLj()
10848 .addReg(NewVReg1, RegState::Kill) in SetupEntryBlockForSjLj()
10870 Register NewVReg1 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10871 BuildMI(*MBB, MI, dl, TII->get(ARM::tLDRpci), NewVReg1) in SetupEntryBlockForSjLj()
10877 .addReg(NewVReg1, RegState::Kill) in SetupEntryBlockForSjLj()
10906 Register NewVReg1 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10907 BuildMI(*MBB, MI, dl, TII->get(ARM::LDRi12), NewVReg1) in SetupEntryBlockForSjLj()
10914 .addReg(NewVReg1, RegState::Kill) in SetupEntryBlockForSjLj()
11031 Register NewVReg1 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
11032 BuildMI(DispatchBB, dl, TII->get(ARM::t2LDRi12), NewVReg1) in EmitSjLjDispatchBlock()
11040 .addReg(NewVReg1) in EmitSjLjDispatchBlock()
11059 .addReg(NewVReg1) in EmitSjLjDispatchBlock()
11077 .addReg(NewVReg1) in EmitSjLjDispatchBlock()
11084 .addReg(NewVReg1) in EmitSjLjDispatchBlock()
11087 Register NewVReg1 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
11088 BuildMI(DispatchBB, dl, TII->get(ARM::tLDRspi), NewVReg1) in EmitSjLjDispatchBlock()
11096 .addReg(NewVReg1) in EmitSjLjDispatchBlock()
11114 .addReg(NewVReg1) in EmitSjLjDispatchBlock()
11127 .addReg(NewVReg1) in EmitSjLjDispatchBlock()
11168 Register NewVReg1 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
11169 BuildMI(DispatchBB, dl, TII->get(ARM::LDRi12), NewVReg1) in EmitSjLjDispatchBlock()
11177 .addReg(NewVReg1) in EmitSjLjDispatchBlock()
11196 .addReg(NewVReg1) in EmitSjLjDispatchBlock()
11215 .addReg(NewVReg1) in EmitSjLjDispatchBlock()
11227 .addReg(NewVReg1) in EmitSjLjDispatchBlock()