Lines Matching refs:isUpdating
215 void SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs,
223 void SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs,
230 void SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating,
308 void SelectVLDDup(SDNode *N, bool IsIntrinsic, bool isUpdating,
2115 void ARMDAGToDAGISel::SelectVLD(SDNode *N, bool isUpdating, unsigned NumVecs, in SelectVLD() argument
2124 bool IsIntrinsic = !isUpdating; // By coincidence, all supported updating in SelectVLD()
2168 if (isUpdating) in SelectVLD()
2183 if (isUpdating) { in SelectVLD()
2219 if (isUpdating) { in SelectVLD()
2252 if (isUpdating) in SelectVLD()
2257 void ARMDAGToDAGISel::SelectVST(SDNode *N, bool isUpdating, unsigned NumVecs, in SelectVST() argument
2266 bool IsIntrinsic = !isUpdating; // By coincidence, all supported updating in SelectVST()
2303 if (isUpdating) in SelectVST()
2342 if (isUpdating) { in SelectVST()
2394 if (isUpdating) { in SelectVST()
2411 void ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad, bool isUpdating, in SelectVLDSTLane() argument
2420 bool IsIntrinsic = !isUpdating; // By coincidence, all supported updating in SelectVLDSTLane()
2475 if (isUpdating) in SelectVLDSTLane()
2485 if (isUpdating) { in SelectVLDSTLane()
2535 if (isUpdating) in SelectVLDSTLane()
2954 bool isUpdating, unsigned NumVecs, in SelectVLDDup() argument
3013 if (isUpdating) in SelectVLDDup()
3026 if (isUpdating) { in SelectVLDDup()
3074 if (isUpdating) in SelectVLDDup()