Lines Matching refs:Reg0
2173 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLD() local
2195 Ops.push_back(Reg0); in SelectVLD()
2198 Ops.push_back(Reg0); in SelectVLD()
2211 const SDValue OpsA[] = { MemAddr, Align, Reg0, ImplDef, Pred, Reg0, Chain }; in SelectVLD()
2224 Ops.push_back(Reg0); in SelectVLD()
2228 Ops.push_back(Reg0); in SelectVLD()
2308 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVST() local
2355 Ops.push_back(Reg0); in SelectVST()
2359 Ops.push_back(Reg0); in SelectVST()
2384 const SDValue OpsA[] = { MemAddr, Align, Reg0, RegSeq, Pred, Reg0, Chain }; in SelectVST()
2399 Ops.push_back(Reg0); in SelectVST()
2403 Ops.push_back(Reg0); in SelectVST()
2480 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDSTLane() local
2489 Ops.push_back(IsImmUpdate ? Reg0 : Inc); in SelectVLDSTLane()
2513 Ops.push_back(Reg0); in SelectVLDSTLane()
3018 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDDup() local
3032 Ops.push_back(Reg0); in SelectVLDDup()
3044 const SDValue OpsA[] = {MemAddr, Align, ImplDef, Pred, Reg0, Chain}; in SelectVLDDup()
3052 Ops.push_back(Reg0); in SelectVLDDup()
3367 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3375 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
3386 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
3395 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3415 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3420 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3437 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3442 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3458 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3463 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3808 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3810 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
3814 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
3815 Reg0 }; in Select()
3827 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3829 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
3833 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
3834 Reg0 }; in Select()
5192 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
5193 SDValue Ops[] = { Src, Src, Pred, Reg0 }; in Select()
5203 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
5204 SDValue Ops[] = { Src, Pred, Reg0 }; in Select()
5782 Register Reg0 = cast<RegisterSDNode>(V0)->getReg(); in tryInlineAsm() local
5804 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in tryInlineAsm()
5818 SDValue T0 = CurDAG->getCopyFromReg(Chain, dl, Reg0, MVT::i32, in tryInlineAsm()